Lines Matching refs:dividend

3853     Register dividend = locations->InAt(0).AsRegister<Register>();  in DivRemOneOrMinusOne()  local
3859 __ Subu(out, ZERO, dividend); in DivRemOneOrMinusOne()
3860 } else if (out != dividend) { in DivRemOneOrMinusOne()
3861 __ Move(out, dividend); in DivRemOneOrMinusOne()
3899 Register dividend = locations->InAt(0).AsRegister<Register>(); in DivRemByPowerOfTwo() local
3907 __ Srl(TMP, dividend, 31); in DivRemByPowerOfTwo()
3909 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo()
3912 __ Addu(out, dividend, TMP); in DivRemByPowerOfTwo()
3920 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo()
3921 __ Subu(out, dividend, TMP); in DivRemByPowerOfTwo()
3925 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo()
3927 __ Addu(out, dividend, TMP); in DivRemByPowerOfTwo()
4102 Register dividend = locations->InAt(0).AsRegister<Register>(); in GenerateDivRemWithAnyConstant() local
4113 __ MuhR6(TMP, dividend, TMP); in GenerateDivRemWithAnyConstant()
4115 __ MultR2(dividend, TMP); in GenerateDivRemWithAnyConstant()
4119 __ Addu(TMP, TMP, dividend); in GenerateDivRemWithAnyConstant()
4121 __ Subu(TMP, TMP, dividend); in GenerateDivRemWithAnyConstant()
4140 __ Subu(out, dividend, TMP); in GenerateDivRemWithAnyConstant()
4165 Register dividend = locations->InAt(0).AsRegister<Register>(); in GenerateDivRemIntegral() local
4170 __ DivR6(out, dividend, divisor); in GenerateDivRemIntegral()
4172 __ DivR2(out, dividend, divisor); in GenerateDivRemIntegral()
4176 __ ModR6(out, dividend, divisor); in GenerateDivRemIntegral()
4178 __ ModR2(out, dividend, divisor); in GenerateDivRemIntegral()