Lines Matching refs:TMP
610 DCHECK_NE(temp1_, TMP); in EmitNativeCode()
662 GpuRegister tmp_ptr = TMP; // Pointer to actual memory. in EmitNativeCode()
1056 ScratchRegisterScope ensure_scratch(this, TMP, V0, codegen_->GetNumberOfCoreRegisters()); in Exchange()
1064 TMP, in Exchange()
1071 __ StoreToOffset(store_type, TMP, SP, index1 + stack_offset); in Exchange()
1093 __ Lhu(TMP, kMethodRegisterArgument, ArtMethod::HotnessCountOffset().Int32Value()); in GenerateFrameEntry()
1094 __ Addiu(TMP, TMP, 1); in GenerateFrameEntry()
1095 __ Sh(TMP, kMethodRegisterArgument, ArtMethod::HotnessCountOffset().Int32Value()); in GenerateFrameEntry()
1359 gpr = TMP; in MoveLocation()
1366 gpr = TMP; in MoveLocation()
1376 __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex()); in MoveLocation()
1377 __ StoreToOffset(kStoreWord, TMP, SP, destination.GetStackIndex()); in MoveLocation()
1379 __ LoadFromOffset(kLoadDoubleword, TMP, SP, source.GetStackIndex()); in MoveLocation()
1380 __ StoreToOffset(kStoreDoubleword, TMP, SP, destination.GetStackIndex()); in MoveLocation()
1405 __ Move(TMP, r2); in SwapLocations()
1407 __ Move(r1, TMP); in SwapLocations()
1435 __ LoadFromOffset(load_type, TMP, SP, mem_loc.GetStackIndex()); in SwapLocations()
1442 __ Mtc1(TMP, reg_loc.AsFpuRegister<FpuRegister>()); in SwapLocations()
1445 __ Dmtc1(TMP, reg_loc.AsFpuRegister<FpuRegister>()); in SwapLocations()
1449 __ Move(reg_loc.AsRegister<GpuRegister>(), TMP); in SwapLocations()
1489 GpuRegister temp = TMP; in MarkGCCard()
1776 blocked_core_registers_[TMP] = true; in SetupBlockedRegisters()
1872 __ LoadFromOffset(kLoadUnsignedByte, TMP, class_reg, status_byte_offset); in GenerateClassInitializationCheck()
1873 __ Sltiu(TMP, TMP, shifted_initialized_value); in GenerateClassInitializationCheck()
1874 __ Bnezc(TMP, slow_path->GetEntryLabel()); in GenerateClassInitializationCheck()
1900 __ LoadConst32(TMP, path_to_root); in GenerateBitstringTypeCheckCompare()
1901 __ Xor(temp, temp, TMP); in GenerateBitstringTypeCheckCompare()
1930 TMP, in GenerateSuspendCheck()
1934 __ Bnezc(TMP, slow_path->GetEntryLabel()); in GenerateSuspendCheck()
1937 __ Beqzc(TMP, codegen_->GetLabelOf(successor)); in GenerateSuspendCheck()
2338 __ Daddu(TMP, obj, index.AsRegister<GpuRegister>()); in VisitArrayGet()
2339 __ LoadFromOffset(kLoadUnsignedByte, out, TMP, data_offset, null_checker); in VisitArrayGet()
2351 __ Daddu(TMP, obj, index.AsRegister<GpuRegister>()); in VisitArrayGet()
2352 __ LoadFromOffset(kLoadSignedByte, out, TMP, data_offset, null_checker); in VisitArrayGet()
2361 __ LoadFromOffset(kLoadWord, TMP, obj, count_offset, null_checker); in VisitArrayGet()
2362 __ Dext(TMP, TMP, 0, 1); in VisitArrayGet()
2370 __ Bnezc(TMP, &uncompressed_load); in VisitArrayGet()
2393 __ Bnezc(TMP, &uncompressed_load); in VisitArrayGet()
2394 __ Daddu(TMP, obj, index_reg); in VisitArrayGet()
2395 __ LoadFromOffset(kLoadUnsignedByte, out, TMP, data_offset); in VisitArrayGet()
2398 __ Dlsa(TMP, index_reg, obj, TIMES_2); in VisitArrayGet()
2399 __ LoadFromOffset(kLoadUnsignedHalfword, out, TMP, data_offset); in VisitArrayGet()
2402 __ Dlsa(TMP, index_reg, obj, TIMES_2); in VisitArrayGet()
2403 __ LoadFromOffset(kLoadUnsignedHalfword, out, TMP, data_offset, null_checker); in VisitArrayGet()
2416 __ Dlsa(TMP, index.AsRegister<GpuRegister>(), obj, TIMES_2); in VisitArrayGet()
2417 __ LoadFromOffset(kLoadSignedHalfword, out, TMP, data_offset, null_checker); in VisitArrayGet()
2432 __ Dlsa(TMP, index.AsRegister<GpuRegister>(), obj, TIMES_4); in VisitArrayGet()
2433 __ LoadFromOffset(load_type, out, TMP, data_offset, null_checker); in VisitArrayGet()
2482 __ Dlsa(TMP, index.AsRegister<GpuRegister>(), obj, TIMES_4); in VisitArrayGet()
2483 __ LoadFromOffset(kLoadUnsignedWord, out, TMP, data_offset, null_checker); in VisitArrayGet()
2505 __ Dlsa(TMP, index.AsRegister<GpuRegister>(), obj, TIMES_8); in VisitArrayGet()
2506 __ LoadFromOffset(kLoadDoubleword, out, TMP, data_offset, null_checker); in VisitArrayGet()
2518 __ Dlsa(TMP, index.AsRegister<GpuRegister>(), obj, TIMES_4); in VisitArrayGet()
2519 __ LoadFpuFromOffset(kLoadWord, out, TMP, data_offset, null_checker); in VisitArrayGet()
2531 __ Dlsa(TMP, index.AsRegister<GpuRegister>(), obj, TIMES_8); in VisitArrayGet()
2532 __ LoadFpuFromOffset(kLoadDoubleword, out, TMP, data_offset, null_checker); in VisitArrayGet()
2619 GpuRegister base_reg = index.IsConstant() ? obj : TMP; in VisitArraySet()
2633 __ StoreConstToOffset(kStoreByte, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2651 __ StoreConstToOffset(kStoreHalfword, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2668 __ StoreConstToOffset(kStoreWord, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2687 __ StoreConstToOffset(kStoreWord, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2696 GpuRegister temp2 = TMP; // Doesn't need to survive slow path. in VisitArraySet()
2800 __ StoreConstToOffset(kStoreDoubleword, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2817 __ StoreConstToOffset(kStoreWord, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2834 __ StoreConstToOffset(kStoreDoubleword, value, base_reg, data_offset, TMP, null_checker); in VisitArraySet()
2918 __ Sltiu(TMP, index, length); in VisitBoundsCheck()
2919 __ Beqzc(TMP, slow_path->GetEntryLabel()); in VisitBoundsCheck()
2934 __ Sltiu(TMP, length, index + 1); in VisitBoundsCheck()
2935 __ Bnezc(TMP, slow_path->GetEntryLabel()); in VisitBoundsCheck()
3134 __ Lw(TMP, temp, array_length_offset); in VisitCheckCast()
3138 __ Beqzc(TMP, slow_path->GetEntryLabel()); in VisitCheckCast()
3143 __ Addiu(TMP, TMP, -2); in VisitCheckCast()
3255 __ Slt(TMP, lhs, rhs); in VisitCompare()
3257 __ Subu(res, res, TMP); in VisitCompare()
3399 __ Srl(TMP, dividend, 31); in DivRemByPowerOfTwo()
3401 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo()
3402 __ Srl(TMP, TMP, 32 - ctz_imm); in DivRemByPowerOfTwo()
3404 __ Addu(out, dividend, TMP); in DivRemByPowerOfTwo()
3413 __ Dsrl32(TMP, dividend, 31); in DivRemByPowerOfTwo()
3415 __ Dsra32(TMP, dividend, 31); in DivRemByPowerOfTwo()
3417 __ Dsrl(TMP, TMP, 64 - ctz_imm); in DivRemByPowerOfTwo()
3419 __ Dsrl32(TMP, TMP, 32 - ctz_imm); in DivRemByPowerOfTwo()
3422 __ Daddu(out, dividend, TMP); in DivRemByPowerOfTwo()
3436 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo()
3437 __ Subu(out, dividend, TMP); in DivRemByPowerOfTwo()
3439 __ Addu(out, out, TMP); in DivRemByPowerOfTwo()
3441 __ Sra(TMP, dividend, 31); in DivRemByPowerOfTwo()
3442 __ Srl(TMP, TMP, 32 - ctz_imm); in DivRemByPowerOfTwo()
3443 __ Addu(out, dividend, TMP); in DivRemByPowerOfTwo()
3445 __ Subu(out, out, TMP); in DivRemByPowerOfTwo()
3451 __ Dsra32(TMP, dividend, 31); in DivRemByPowerOfTwo()
3452 __ Dsubu(out, dividend, TMP); in DivRemByPowerOfTwo()
3454 __ Daddu(out, out, TMP); in DivRemByPowerOfTwo()
3456 __ Dsra32(TMP, dividend, 31); in DivRemByPowerOfTwo()
3458 __ Dsrl(TMP, TMP, 64 - ctz_imm); in DivRemByPowerOfTwo()
3460 __ Dsrl32(TMP, TMP, 32 - ctz_imm); in DivRemByPowerOfTwo()
3462 __ Daddu(out, dividend, TMP); in DivRemByPowerOfTwo()
3464 __ Dsubu(out, out, TMP); in DivRemByPowerOfTwo()
3492 __ LoadConst32(TMP, magic); in GenerateDivRemWithAnyConstant()
3493 __ MuhR6(TMP, dividend, TMP); in GenerateDivRemWithAnyConstant()
3496 __ Addu(TMP, TMP, dividend); in GenerateDivRemWithAnyConstant()
3498 __ Subu(TMP, TMP, dividend); in GenerateDivRemWithAnyConstant()
3502 __ Sra(TMP, TMP, shift); in GenerateDivRemWithAnyConstant()
3506 __ Sra(out, TMP, 31); in GenerateDivRemWithAnyConstant()
3507 __ Subu(out, TMP, out); in GenerateDivRemWithAnyConstant()
3509 __ Sra(AT, TMP, 31); in GenerateDivRemWithAnyConstant()
3510 __ Subu(AT, TMP, AT); in GenerateDivRemWithAnyConstant()
3511 __ LoadConst32(TMP, imm); in GenerateDivRemWithAnyConstant()
3512 __ MulR6(TMP, AT, TMP); in GenerateDivRemWithAnyConstant()
3513 __ Subu(out, dividend, TMP); in GenerateDivRemWithAnyConstant()
3516 __ LoadConst64(TMP, magic); in GenerateDivRemWithAnyConstant()
3517 __ Dmuh(TMP, dividend, TMP); in GenerateDivRemWithAnyConstant()
3520 __ Daddu(TMP, TMP, dividend); in GenerateDivRemWithAnyConstant()
3522 __ Dsubu(TMP, TMP, dividend); in GenerateDivRemWithAnyConstant()
3526 __ Dsra32(TMP, TMP, shift - 32); in GenerateDivRemWithAnyConstant()
3528 __ Dsra(TMP, TMP, shift); in GenerateDivRemWithAnyConstant()
3532 __ Dsra32(out, TMP, 31); in GenerateDivRemWithAnyConstant()
3533 __ Dsubu(out, TMP, out); in GenerateDivRemWithAnyConstant()
3535 __ Dsra32(AT, TMP, 31); in GenerateDivRemWithAnyConstant()
3536 __ Dsubu(AT, TMP, AT); in GenerateDivRemWithAnyConstant()
3537 __ LoadConst64(TMP, imm); in GenerateDivRemWithAnyConstant()
3538 __ Dmul(TMP, AT, TMP); in GenerateDivRemWithAnyConstant()
3539 __ Dsubu(out, dividend, TMP); in GenerateDivRemWithAnyConstant()
3701 __ Lhu(TMP, AT, ArtMethod::HotnessCountOffset().Int32Value()); in HandleGoto()
3702 __ Addiu(TMP, TMP, 1); in HandleGoto()
3703 __ Sh(TMP, AT, ArtMethod::HotnessCountOffset().Int32Value()); in HandleGoto()
3782 rhs_reg = TMP; in GenerateIntLongCompare()
3801 rhs_reg = TMP; in GenerateIntLongCompare()
3825 rhs_reg = TMP; in GenerateIntLongCompare()
3847 rhs_reg = TMP; in GenerateIntLongCompare()
3877 rhs_reg = TMP; in GenerateIntLongCompare()
3924 rhs_reg = TMP; in MaterializeIntLongCompare()
3937 rhs_reg = TMP; in MaterializeIntLongCompare()
3952 rhs_reg = TMP; in MaterializeIntLongCompare()
3969 rhs_reg = TMP; in MaterializeIntLongCompare()
3990 rhs_reg = TMP; in MaterializeIntLongCompare()
4048 rhs_reg = TMP; in GenerateIntLongCompareAndBranch()
4664 GpuRegister cond_reg = TMP; in GenConditionalMove()
4729 __ Selnez(TMP, false_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4732 __ Seleqz(TMP, false_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4734 __ Or(dst.AsRegister<GpuRegister>(), AT, TMP); in GenConditionalMove()
4740 __ Sltu(TMP, ZERO, cond_reg); in GenConditionalMove()
4741 __ Mtc1(TMP, fcond_reg); in GenConditionalMove()
4775 __ Sltu(TMP, ZERO, cond_reg); in GenConditionalMove()
4776 __ Mtc1(TMP, fcond_reg); in GenConditionalMove()
5035 __ StoreConstToOffset(store_type, value, obj, offset, TMP, null_checker); in HandleFieldSet()
5045 __ PoisonHeapReference(TMP, src); in HandleFieldSet()
5046 __ StoreToOffset(store_type, TMP, obj, offset, null_checker); in HandleFieldSet()
5224 GpuRegister base = short_offset ? obj : TMP; in GenerateGcRootFieldLoad()
5373 __ Daui(TMP, obj, offset_high); // In delay slot. in GenerateFieldLoadWithBakerReadBarrier()
5377 __ LoadFromOffset(kLoadUnsignedWord, ref_reg, TMP, offset_low); // Single instruction. in GenerateFieldLoadWithBakerReadBarrier()
5453 __ Dlsa(TMP, index_reg, obj, scale_factor); // In delay slot. in GenerateArrayLoadWithBakerReadBarrier()
5458 __ LoadFromOffset(kLoadUnsignedWord, ref_reg, TMP, data_offset); // Single instruction. in GenerateArrayLoadWithBakerReadBarrier()
5534 __ Daddu(TMP, index_reg, obj); in GenerateReferenceLoadWithBakerReadBarrier()
5536 __ Dlsa(TMP, index_reg, obj, scale_factor); in GenerateReferenceLoadWithBakerReadBarrier()
5538 __ LoadFromOffset(kLoadUnsignedWord, ref_reg, TMP, offset); in GenerateReferenceLoadWithBakerReadBarrier()
7508 GpuRegister temp_reg = TMP; in GenPackedSwitchWithCompares()
7552 __ Addiu32(TMP, value_reg, -lower_bound); in GenTableBasedPackedSwitch()
7554 __ Bgeuc(TMP, AT, codegen_->GetLabelOf(default_block)); in GenTableBasedPackedSwitch()
7559 __ Dlsa(TMP, TMP, AT, 2); in GenTableBasedPackedSwitch()
7560 __ Lw(TMP, TMP, 0); in GenTableBasedPackedSwitch()
7563 __ Daddu(TMP, TMP, AT); in GenTableBasedPackedSwitch()
7565 __ Jr(TMP); in GenTableBasedPackedSwitch()