Lines Matching refs:cond_reg
4664 GpuRegister cond_reg = TMP; in GenConditionalMove() local
4671 cond_reg = locations->InAt(/* at= */ 2).AsRegister<GpuRegister>(); in GenConditionalMove()
4682 cond_reg); in GenConditionalMove()
4688 cond_reg); in GenConditionalMove()
4711 __ Mfc1(cond_reg, fcond_reg); in GenConditionalMove()
4715 __ Selnez(dst.AsRegister<GpuRegister>(), false_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4717 __ Seleqz(dst.AsRegister<GpuRegister>(), false_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4721 __ Seleqz(dst.AsRegister<GpuRegister>(), true_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4723 __ Selnez(dst.AsRegister<GpuRegister>(), true_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4726 DCHECK_NE(cond_reg, AT); in GenConditionalMove()
4728 __ Seleqz(AT, true_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4729 __ Selnez(TMP, false_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4731 __ Selnez(AT, true_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4732 __ Seleqz(TMP, false_src.AsRegister<GpuRegister>(), cond_reg); in GenConditionalMove()
4740 __ Sltu(TMP, ZERO, cond_reg); in GenConditionalMove()
4775 __ Sltu(TMP, ZERO, cond_reg); in GenConditionalMove()