3361   GpuRegister dividend = locations->InAt(0).AsRegister<GpuRegister>();  in DivRemOneOrMinusOne()  local
3370         __ Subu(out, ZERO, dividend);  in DivRemOneOrMinusOne()
3373         __ Dsubu(out, ZERO, dividend);  in DivRemOneOrMinusOne()
3375     } else if (out != dividend) {  in DivRemOneOrMinusOne()
3376       __ Move(out, dividend);  in DivRemOneOrMinusOne()
3390   GpuRegister dividend = locations->InAt(0).AsRegister<GpuRegister>();  in DivRemByPowerOfTwo()  local
3399         __ Srl(TMP, dividend, 31);  in DivRemByPowerOfTwo()
3401         __ Sra(TMP, dividend, 31);  in DivRemByPowerOfTwo()
3404       __ Addu(out, dividend, TMP);  in DivRemByPowerOfTwo()
3413         __ Dsrl32(TMP, dividend, 31);  in DivRemByPowerOfTwo()
3415         __ Dsra32(TMP, dividend, 31);  in DivRemByPowerOfTwo()
3422       __ Daddu(out, dividend, TMP);  in DivRemByPowerOfTwo()
3436         __ Sra(TMP, dividend, 31);  in DivRemByPowerOfTwo()
3437         __ Subu(out, dividend, TMP);  in DivRemByPowerOfTwo()
3441         __ Sra(TMP, dividend, 31);  in DivRemByPowerOfTwo()
3443         __ Addu(out, dividend, TMP);  in DivRemByPowerOfTwo()
3451         __ Dsra32(TMP, dividend, 31);  in DivRemByPowerOfTwo()
3452         __ Dsubu(out, dividend, TMP);  in DivRemByPowerOfTwo()
3456         __ Dsra32(TMP, dividend, 31);  in DivRemByPowerOfTwo()
3462         __ Daddu(out, dividend, TMP);  in DivRemByPowerOfTwo()
3478   GpuRegister dividend = locations->InAt(0).AsRegister<GpuRegister>();  in GenerateDivRemWithAnyConstant()  local
3493     __ MuhR6(TMP, dividend, TMP);  in GenerateDivRemWithAnyConstant()
3496       __ Addu(TMP, TMP, dividend);  in GenerateDivRemWithAnyConstant()
3498       __ Subu(TMP, TMP, dividend);  in GenerateDivRemWithAnyConstant()
3513       __ Subu(out, dividend, TMP);  in GenerateDivRemWithAnyConstant()
3517     __ Dmuh(TMP, dividend, TMP);  in GenerateDivRemWithAnyConstant()
3520       __ Daddu(TMP, TMP, dividend);  in GenerateDivRemWithAnyConstant()
3522       __ Dsubu(TMP, TMP, dividend);  in GenerateDivRemWithAnyConstant()
3539       __ Dsubu(out, dividend, TMP);  in GenerateDivRemWithAnyConstant()
3566     GpuRegister dividend = locations->InAt(0).AsRegister<GpuRegister>();  in GenerateDivRemIntegral()  local
3570         __ DivR6(out, dividend, divisor);  in GenerateDivRemIntegral()
3572         __ Ddiv(out, dividend, divisor);  in GenerateDivRemIntegral()
3575         __ ModR6(out, dividend, divisor);  in GenerateDivRemIntegral()
3577         __ Dmod(out, dividend, divisor);  in GenerateDivRemIntegral()