MipsGenAsmWriter.inc - OpenGrok cross reference for /external/capstone/arch/Mips/MipsGenAsmWriter.inc

Lines Matching refs:MCInst_getOperand
5061 …ss_contains(MCRegisterInfo_getRegClass(MRI, _class), MCOperand_getReg(MCInst_getOperand(MI, _reg)))
5070         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5072         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5074         MCOperand_getReg(MCInst_getOperand(MI, 2)) == Mips_ZERO) {
5082         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5090         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5098         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5106         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5114         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_FCC0) {
5122         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_FCC0) {
5130         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_FCC0) {
5138         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_FCC0) {
5146         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5154         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5162         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5170         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5178         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5186         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5194         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5202         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_CC0) {
5210         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
5211         MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0 &&
5212         MCOperand_isImm(MCInst_getOperand(MI, 1)) &&
5213         MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) {
5219         MCOperand_isImm(MCInst_getOperand(MI, 1)) &&
5220         MCOperand_getImm(MCInst_getOperand(MI, 1)) == 0) {
5228         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5230         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5232         MCOperand_getReg(MCInst_getOperand(MI, 2)) == Mips_ZERO_64) {
5240         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO) {
5248         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO) {
5256         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO &&
5257         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5266         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO_64 &&
5267         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5276         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_RA &&
5277         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5286         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
5287         MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {
5295         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
5296         MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {
5304         MCOperand_getReg(MCInst_getOperand(MI, 0)) == Mips_ZERO &&
5305         MCOperand_getReg(MCInst_getOperand(MI, 1)) == Mips_ZERO &&
5306         MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
5307         MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
5315         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5317         MCOperand_getReg(MCInst_getOperand(MI, 1)) == Mips_ZERO &&
5318         MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
5327         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5329         MCOperand_getReg(MCInst_getOperand(MI, 1)) == Mips_ZERO &&
5330         MCOperand_isReg(MCInst_getOperand(MI, 2)) &&
5339         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
5340         MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {
5348         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
5349         MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {
5357         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5359         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5361         MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
5362         MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
5370         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5372         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5374         MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
5375         MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
5383         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5385         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5387         MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
5388         MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
5396         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5398         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5400         MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
5401         MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
5409         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5411         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5413         MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
5414         MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
5422         MCOperand_isReg(MCInst_getOperand(MI, 0)) &&
5424         MCOperand_isReg(MCInst_getOperand(MI, 1)) &&
5426         MCOperand_isImm(MCInst_getOperand(MI, 2)) &&
5427         MCOperand_getImm(MCInst_getOperand(MI, 2)) == 0) {
5435         MCOperand_isImm(MCInst_getOperand(MI, 0)) &&
5436         MCOperand_getImm(MCInst_getOperand(MI, 0)) == 0) {