Lines Matching refs:mcInst

65 static void translateRegister(MCInst *mcInst, Reg reg)  in translateRegister()  argument
75 MCOperand_CreateReg0(mcInst, llvmRegnum); in translateRegister()
92 static bool translateSrcIndex(MCInst *mcInst, InternalInstruction *insn) in translateSrcIndex() argument
105 MCOperand_CreateReg0(mcInst, baseRegNo); in translateSrcIndex()
107 MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); in translateSrcIndex()
116 static bool translateDstIndex(MCInst *mcInst, InternalInstruction *insn) in translateDstIndex() argument
129 MCOperand_CreateReg0(mcInst, baseRegNo); in translateDstIndex()
140 static void translateImmediate(MCInst *mcInst, uint64_t immediate, in translateImmediate() argument
171 uint32_t Opcode = MCInst_getOpcode(mcInst); in translateImmediate()
221 switch (MCInst_getOpcode(mcInst)) { in translateImmediate()
234 MCInst_setOpcode(mcInst, NewOpc); in translateImmediate()
244 switch (MCInst_getOpcode(mcInst)) { in translateImmediate()
269 MCInst_setOpcode(mcInst, NewOpc); in translateImmediate()
279 MCOperand_CreateReg0(mcInst, X86_XMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
282 MCOperand_CreateReg0(mcInst, X86_YMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
285 MCOperand_CreateReg0(mcInst, X86_ZMM0 + ((uint32_t)immediate >> 4)); in translateImmediate()
301 MCOperand_CreateImm0(mcInst, immediate); in translateImmediate()
305 MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); in translateImmediate()
315 static bool translateRMRegister(MCInst *mcInst, InternalInstruction *insn) in translateRMRegister() argument
334 MCOperand_CreateReg0(mcInst, X86_##x); break; in translateRMRegister()
353 static bool translateRMMemory(MCInst *mcInst, InternalInstruction *insn) in translateRMMemory() argument
378 MCOperand_CreateReg0(mcInst, X86_##x); break; in translateRMMemory()
386 MCOperand_CreateReg0(mcInst, 0); in translateRMMemory()
396 Opcode = MCInst_getOpcode(mcInst); in translateRMMemory()
476 MCOperand_CreateReg0(mcInst, X86_EIP); in translateRMMemory()
478 MCOperand_CreateReg0(mcInst, X86_RIP); // Section 2.2.1.6 in translateRMMemory()
480 MCOperand_CreateReg0(mcInst, 0); in translateRMMemory()
486 MCOperand_CreateReg0(mcInst, X86_BX); in translateRMMemory()
490 MCOperand_CreateReg0(mcInst, X86_BX); in translateRMMemory()
494 MCOperand_CreateReg0(mcInst, X86_BP); in translateRMMemory()
498 MCOperand_CreateReg0(mcInst, X86_BP); in translateRMMemory()
513 MCOperand_CreateReg0(mcInst, X86_##x); break; in translateRMMemory()
528 MCOperand_CreateImm0(mcInst, scaleAmount); in translateRMMemory()
529 MCOperand_CreateReg0(mcInst, indexReg); in translateRMMemory()
530 MCOperand_CreateImm0(mcInst, insn->displacement); in translateRMMemory()
532 MCOperand_CreateReg0(mcInst, segmentRegnums[insn->segmentOverride]); in translateRMMemory()
545 static bool translateRM(MCInst *mcInst, const OperandSpecifier *operand, in translateRM() argument
568 return translateRMRegister(mcInst, insn); in translateRM()
588 return translateRMMemory(mcInst, insn); in translateRM()
600 static void translateFPRegister(MCInst *mcInst, uint8_t stackPos) in translateFPRegister() argument
602 MCOperand_CreateReg0(mcInst, X86_ST0 + stackPos); in translateFPRegister()
611 static bool translateMaskRegister(MCInst *mcInst, uint8_t maskRegNum) in translateMaskRegister() argument
618 MCOperand_CreateReg0(mcInst, X86_K0 + maskRegNum); in translateMaskRegister()
630 static bool translateOperand(MCInst *mcInst, const OperandSpecifier *operand, InternalInstruction *… in translateOperand() argument
634 translateRegister(mcInst, insn->reg); in translateOperand()
637 return translateMaskRegister(mcInst, insn->writemask); in translateOperand()
639 return translateRM(mcInst, operand, insn); in translateOperand()
654 translateImmediate(mcInst, insn->immediates[insn->numImmediatesTranslated++], operand, insn); in translateOperand()
657 return translateSrcIndex(mcInst, insn); in translateOperand()
659 return translateDstIndex(mcInst, insn); in translateOperand()
665 translateRegister(mcInst, insn->opcodeRegister); in translateOperand()
668 translateFPRegister(mcInst, insn->modRM & 7); in translateOperand()
671 translateRegister(mcInst, insn->vvvv); in translateOperand()
674 return translateOperand(mcInst, &insn->operands[operand->type - TYPE_DUP0], insn); in translateOperand()
681 static bool translateInstruction(MCInst *mcInst, InternalInstruction *insn) in translateInstruction() argument
690 MCInst_setOpcode(mcInst, insn->instructionID); in translateInstruction()
697 if (MCInst_getOpcode(mcInst) == X86_REP_PREFIX) in translateInstruction()
698 MCInst_setOpcode(mcInst, X86_XRELEASE_PREFIX); in translateInstruction()
699 else if (MCInst_getOpcode(mcInst) == X86_REPNE_PREFIX) in translateInstruction()
700 MCInst_setOpcode(mcInst, X86_XACQUIRE_PREFIX); in translateInstruction()
708 if (translateOperand(mcInst, &insn->operands[index], insn)) { in translateInstruction()