47767 		MI->flat_insn->detail->regs_read[MI->flat_insn->detail->regs_read_count] = cx;  in add_cx()
47768 		MI->flat_insn->detail->regs_read_count++;  in add_cx()
47770 		MI->flat_insn->detail->regs_write[MI->flat_insn->detail->regs_write_count] = cx;  in add_cx()
47771 		MI->flat_insn->detail->regs_write_count++;  in add_cx()
47862 		memcpy(MI->flat_insn->detail->x86.prefix, MI->x86_prefix, ARR_SIZE(MI->x86_prefix));  in X86_lockrep()
47870 		MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_REG;  in op_addReg()
47871 		MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].reg = reg;  in op_addReg()
47872 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->csh->regsize_m…  in op_addReg()
47873 		MI->flat_insn->detail->x86.op_count++;  in op_addReg()
47883 		MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].type = X86_OP_IMM;  in op_addImm()
47884 		MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].imm = v;  in op_addImm()
47887 			if (MI->flat_insn->detail->x86.op_count > 0)  in op_addImm()
47888 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->flat_insn->det…  in op_addImm()
47890 				MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count].size = MI->imm_size;  in op_addImm()
47893 		MI->flat_insn->detail->x86.op_count++;  in op_addImm()
47903 		MI->flat_insn->detail->x86.sse_cc = v;  in op_addSseCC()
47910 		MI->flat_insn->detail->x86.avx_cc = v;  in op_addAvxCC()
47917 		MI->flat_insn->detail->x86.avx_rm = v;  in op_addAvxRoundingMode()
47926 …MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count - 1].avx_zero_opmask = tru…  in op_addAvxZeroOpmask()
47933 		MI->flat_insn->detail->x86.avx_sae = true;  in op_addAvxSae()
47941 		MI->flat_insn->detail->x86.operands[MI->flat_insn->detail->x86.op_count - 1].avx_bcast = v;  in op_addAvxBroadcast()