Lines Matching refs:__v8df
63 return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A, in _mm512_mask_xor_pd()
64 (__v8df) __B, in _mm512_mask_xor_pd()
65 (__v8df) __W, in _mm512_mask_xor_pd()
71 return (__m512d) __builtin_ia32_xorpd512_mask ((__v8df) __A, in _mm512_maskz_xor_pd()
72 (__v8df) __B, in _mm512_maskz_xor_pd()
73 (__v8df) in _mm512_maskz_xor_pd()
107 return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A, in _mm512_mask_or_pd()
108 (__v8df) __B, in _mm512_mask_or_pd()
109 (__v8df) __W, in _mm512_mask_or_pd()
115 return (__m512d) __builtin_ia32_orpd512_mask ((__v8df) __A, in _mm512_maskz_or_pd()
116 (__v8df) __B, in _mm512_maskz_or_pd()
117 (__v8df) in _mm512_maskz_or_pd()
151 return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A, in _mm512_mask_and_pd()
152 (__v8df) __B, in _mm512_mask_and_pd()
153 (__v8df) __W, in _mm512_mask_and_pd()
159 return (__m512d) __builtin_ia32_andpd512_mask ((__v8df) __A, in _mm512_maskz_and_pd()
160 (__v8df) __B, in _mm512_maskz_and_pd()
161 (__v8df) in _mm512_maskz_and_pd()
190 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, in _mm512_andnot_pd()
191 (__v8df) __B, in _mm512_andnot_pd()
192 (__v8df) in _mm512_andnot_pd()
199 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, in _mm512_mask_andnot_pd()
200 (__v8df) __B, in _mm512_mask_andnot_pd()
201 (__v8df) __W, in _mm512_mask_andnot_pd()
207 return (__m512d) __builtin_ia32_andnpd512_mask ((__v8df) __A, in _mm512_maskz_andnot_pd()
208 (__v8df) __B, in _mm512_maskz_andnot_pd()
209 (__v8df) in _mm512_maskz_andnot_pd()
242 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, in _mm512_cvtpd_epi64()
250 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, in _mm512_mask_cvtpd_epi64()
258 return (__m512i) __builtin_ia32_cvtpd2qq512_mask ((__v8df) __A, in _mm512_maskz_cvtpd_epi64()
265 (__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
270 (__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
275 (__m512i)__builtin_ia32_cvtpd2qq512_mask((__v8df)(__m512d)(A), \
281 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, in _mm512_cvtpd_epu64()
289 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, in _mm512_mask_cvtpd_epu64()
297 return (__m512i) __builtin_ia32_cvtpd2uqq512_mask ((__v8df) __A, in _mm512_maskz_cvtpd_epu64()
304 (__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
309 (__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
314 (__m512i)__builtin_ia32_cvtpd2uqq512_mask((__v8df)(__m512d)(A), \
400 (__v8df) _mm512_setzero_pd(), in _mm512_cvtepi64_pd()
408 (__v8df) __W, in _mm512_mask_cvtepi64_pd()
416 (__v8df) _mm512_setzero_pd(), in _mm512_maskz_cvtepi64_pd()
423 (__v8df)_mm512_setzero_pd(), \
428 (__v8df)(__m512d)(W), \
433 (__v8df)_mm512_setzero_pd(), \
478 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, in _mm512_cvttpd_epi64()
486 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, in _mm512_mask_cvttpd_epi64()
494 return (__m512i) __builtin_ia32_cvttpd2qq512_mask ((__v8df) __A, in _mm512_maskz_cvttpd_epi64()
501 (__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
506 (__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
511 (__m512i)__builtin_ia32_cvttpd2qq512_mask((__v8df)(__m512d)(A), \
517 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, in _mm512_cvttpd_epu64()
525 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, in _mm512_mask_cvttpd_epu64()
533 return (__m512i) __builtin_ia32_cvttpd2uqq512_mask ((__v8df) __A, in _mm512_maskz_cvttpd_epu64()
540 (__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
545 (__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
550 (__m512i)__builtin_ia32_cvttpd2uqq512_mask((__v8df)(__m512d)(A), \
635 (__v8df) _mm512_setzero_pd(), in _mm512_cvtepu64_pd()
643 (__v8df) __W, in _mm512_mask_cvtepu64_pd()
651 (__v8df) _mm512_setzero_pd(), in _mm512_maskz_cvtepu64_pd()
658 (__v8df)_mm512_setzero_pd(), \
663 (__v8df)(__m512d)(W), \
669 (__v8df)_mm512_setzero_pd(), \
713 (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
714 (__v8df)(__m512d)(B), (int)(C), \
715 (__v8df)_mm512_setzero_pd(), \
720 (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
721 (__v8df)(__m512d)(B), (int)(C), \
722 (__v8df)(__m512d)(W), (__mmask8)(U), \
726 (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
727 (__v8df)(__m512d)(B), (int)(C), \
728 (__v8df)_mm512_setzero_pd(), \
733 (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
734 (__v8df)(__m512d)(B), (int)(C), \
735 (__v8df)_mm512_setzero_pd(), \
739 (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
740 (__v8df)(__m512d)(B), (int)(C), \
741 (__v8df)(__m512d)(W), (__mmask8)(U), \
745 (__m512d)__builtin_ia32_rangepd512_mask((__v8df)(__m512d)(A), \
746 (__v8df)(__m512d)(B), (int)(C), \
747 (__v8df)_mm512_setzero_pd(), \
843 (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
844 (__v8df)_mm512_setzero_pd(), \
849 (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
850 (__v8df)(__m512d)(W), \
855 (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
856 (__v8df)_mm512_setzero_pd(), \
879 (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
880 (__v8df)_mm512_setzero_pd(), \
884 (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
885 (__v8df)(__m512d)(W), \
889 (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
890 (__v8df)_mm512_setzero_pd(), \
1060 (__v8df)_mm512_undefined_pd(), in _mm512_broadcast_f64x2()
1068 (__v8df) in _mm512_mask_broadcast_f64x2()
1076 (__v8df)_mm512_setzero_ps (), in _mm512_maskz_broadcast_f64x2()
1169 (__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \
1175 (__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \
1181 (__m128d)__builtin_ia32_extractf64x2_512_mask((__v8df)(__m512d)(A), \
1238 (__m512d)__builtin_ia32_insertf64x2_512_mask((__v8df)(__m512d)(A), \
1241 (__v8df)_mm512_setzero_pd(), \
1245 (__m512d)__builtin_ia32_insertf64x2_512_mask((__v8df)(__m512d)(A), \
1248 (__v8df)(__m512d)(W), \
1252 (__m512d)__builtin_ia32_insertf64x2_512_mask((__v8df)(__m512d)(A), \
1255 (__v8df)_mm512_setzero_pd(), \
1306 (__mmask8)__builtin_ia32_fpclasspd512_mask((__v8df)(__m512d)(A), (int)(imm), \
1310 (__mmask8)__builtin_ia32_fpclasspd512_mask((__v8df)(__m512d)(A), (int)(imm), \