Lines Matching refs:v12

101     mov       v12.s[0], w4              //d12[0] = ui_Bs
106 uxtl v12.8h, v12.8b //q6 = uc_Bs in each 16 bt scalar
119 tbl v14.8b, {v16.16b}, v12.8b //
123 uxtl v12.4s, v12.4h //
127 cmgt v12.4s, v12.4s, #0
143 bic v12.16b, v12.16b , v18.16b //final condition
153 and v20.16b, v20.16b , v12.16b //
154 and v22.16b, v22.16b , v12.16b //
163 … and v18.16b, v18.16b , v12.16b //Making delta zero in places where values shouldn be filterd
265 uabd v12.16b , v4.16b, v6.16b
268 cmhs v18.16b, v12.16b , v0.16b //ABS(p0 - q0) >= Alpha
281 cmhi v20.16b, v20.16b , v12.16b //(ABS(p0 - q0) <((Alpha >>2) + 2))
293 rshrn v12.8b, v16.8h, #3 //(2*(p0+q0+q1)+q2 +p1 +4)>> 3 L [q0']
295 mov v12.d[1] , v13.d[0]
310 bit v16.16b, v12.16b , v22.16b //choosing between q0' and q0" depending on condn
314 rshrn v12.8b, v28.8h, #2 //(p0+q0+q1+q2+2)>>2 L [q1']
316 mov v12.d[1] , v13.d[0]
331 bif v12.16b, v8.16b , v22.16b //choose q1 or filtered value of q1
332 mov v13.d[0] , v12.d[1]
338 st1 {v12.8b, v13.8b}, [x0], x1 //store q1
357 uaddw v12.8h, v24.8h , v30.8b //(p0+q0+p1) +p2 L
362 rshrn v26.8b, v12.8h, #2 //((p0+q0+p1)+p2 +2)>>2,p1' L
369 mla v12.8h, v8.8h , v1.h[0] //(p0+q0+p1)+3*p2+2*p3 L
375 rshrn v12.8b, v12.8h, #3 //((p0+q0+p1)+3*p2+2*p3+4)>>3 L p2'
377 mov v12.d[1] , v13.d[0]
380 bit v30.16b, v12.16b , v16.16b //choosing between p2 and p2'
454 ld1 {v12.8b}, [x0], x1 //row7
481 trn1 v21.8b, v12.8b, v14.8b
482 trn2 v14.8b, v12.8b, v14.8b //row7 & 8
483 mov v12.8b, v21.8b
519 trn1 v21.4h, v8.4h, v12.4h
520 trn2 v12.4h, v8.4h, v12.4h //row 5 & 7
549 trn1 v31.2s, v4.2s, v12.2s
550 trn2 v12.2s, v4.2s, v12.2s //row3 & 7
560 mov v12.d[1] , v13.d[0]
584 uaddl v18.8h, v20.8b, v12.8b //q2 + ((p0 + q0 + 1) >> 1) L
596 uabd v20.16b , v12.16b, v8.16b //ABS(q1 - q0)
638 trn1 v21.8b, v12.8b, v14.8b
639 trn2 v14.8b, v12.8b, v14.8b //row7 & 8
640 mov v12.8b, v21.8b
683 trn1 v21.4h, v8.4h, v12.4h
684 trn2 v12.4h, v8.4h, v12.4h //row 5 & 7
705 trn1 v21.2s, v4.2s, v12.2s
706 trn2 v12.2s, v4.2s, v12.2s //row3 & 7
717 st1 {v12.8b}, [x0], x1 //row7
784 ld1 {v12.8b}, [x0], x1 //row7
806 trn1 v21.8b, v12.8b, v14.8b
807 trn2 v14.8b, v12.8b, v14.8b //row7 & 8
808 mov v12.8b, v21.8b
844 trn1 v21.4h, v8.4h, v12.4h
845 trn2 v12.4h, v8.4h, v12.4h //row 5 & 7
864 trn1 v21.2s, v4.2s, v12.2s
865 trn2 v12.2s, v4.2s, v12.2s //row3 & 7
898 mov v12.d[1] , v13.d[0]
926 uabd v30.16b , v12.16b, v8.16b
958 uaddl v14.8h, v4.8b, v12.8b //p1+q2 L
965 uaddw v18.8h, v18.8h , v12.8b //p0 + q0 + q1 + q2 L
986 uaddl v16.8h, v12.8b, v14.8b //q2+q3 L
1016 bit v12.16b, v18.16b , v30.16b //final q2
1017 mov v13.d[0] , v12.d[1]
1021 trn1 v31.8b, v12.8b, v14.8b
1022 trn2 v14.8b, v12.8b, v14.8b //row7 & 8
1023 mov v12.8b, v31.8b
1034 trn1 v31.4h, v8.4h, v12.4h
1035 trn2 v12.4h, v8.4h, v12.4h //row 5 & 7
1059 trn1 v31.2s, v20.2s, v12.2s
1060 trn2 v12.2s, v20.2s, v12.2s //row3 & 7
1071 st1 {v12.8b}, [x0], x1 //row7