Lines Matching refs:PACKET3
116 #define PACKET3(op, n) ((PACKET_TYPE3 << 30) | \ macro
862 ptr[0]=PACKET3(PACKET3_NOP, 14); in amdgpu_command_submission_compute_nop()
1084 pm4[i++] = PACKET3(PACKET3_WRITE_DATA, 2 + sdma_write_length); in amdgpu_command_submission_write_linear_helper()
1202 pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4); in amdgpu_command_submission_const_fill_helper()
1212 pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); in amdgpu_command_submission_const_fill_helper()
1355 pm4[i++] = PACKET3(PACKET3_DMA_DATA_SI, 4); in amdgpu_command_submission_copy_linear_helper()
1366 pm4[i++] = PACKET3(PACKET3_DMA_DATA, 5); in amdgpu_command_submission_copy_linear_helper()
1657 ptr[i++] = PACKET3(PKT3_CONTEXT_CONTROL, 1); in amdgpu_sync_dependency_test()
1661 ptr[i++] = PACKET3(PKT3_CLEAR_STATE, 0); in amdgpu_sync_dependency_test()
1666 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2); in amdgpu_sync_dependency_test()
1672 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2); in amdgpu_sync_dependency_test()
1712 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 1); in amdgpu_sync_dependency_test()
1716 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 2); in amdgpu_sync_dependency_test()
1721 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 1); in amdgpu_sync_dependency_test()
1725 ptr[i++] = PACKET3(PKT3_SET_SH_REG, 3); in amdgpu_sync_dependency_test()
1733 ptr[i++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in amdgpu_sync_dependency_test()
1763 ptr[i++] = PACKET3(PACKET3_WRITE_DATA, 3); in amdgpu_sync_dependency_test()