Lines Matching refs:v12
242 ld1 {v12.4h},[x0],x6
265 smlal v20.4s, v12.4h, v1.h[0]
267 smlal v22.4s, v12.4h, v3.h[0]
269 smlal v16.4s, v12.4h, v5.h[0]
271 smlal v18.4s, v12.4h, v7.h[0]
314 ld1 {v12.4h},[x0],x6
339 smlal v20.4s, v12.4h, v3.h[0]
341 smlsl v22.4s, v12.4h, v7.h[0]
343 smlsl v16.4s, v12.4h, v1.h[0]
345 smlsl v18.4s, v12.4h, v5.h[0]
388 ld1 {v12.4h},[x0],x6
408 smlal v20.4s, v12.4h, v5.h[0]
410 smlsl v22.4s, v12.4h, v1.h[0]
412 smlal v16.4s, v12.4h, v7.h[0]
414 smlal v18.4s, v12.4h, v3.h[0]
456 ld1 {v12.4h},[x0],x6
474 smlal v20.4s, v12.4h, v7.h[0]
476 smlsl v22.4s, v12.4h, v5.h[0]
478 smlal v16.4s, v12.4h, v3.h[0]
480 smlsl v18.4s, v12.4h, v1.h[0]
489 add v12.4s, v22.4s , v26.4s
504 sqrshrn v12.4h, v12.4s,#shift_stage1_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage1_idct)
517 trn1 v24.4h, v30.4h, v12.4h
518 trn2 v25.4h, v30.4h, v12.4h
524 trn1 v12.2s, v25.2s, v27.2s
554 st1 { v12.4h, v13.4h},[x1],#16
603 ld1 {v12.4h},[x0],x6
621 smlsl v20.4s, v12.4h, v7.h[0]
623 smlsl v22.4s, v12.4h, v5.h[0]
625 smlsl v16.4s, v12.4h, v3.h[0]
627 smlsl v18.4s, v12.4h, v1.h[0]
676 ld1 {v12.4h},[x0],x6
697 smlal v20.4s, v12.4h, v5.h[0]
699 smlal v22.4s, v12.4h, v1.h[0]
701 smlal v16.4s, v12.4h, v7.h[0]
703 smlsl v18.4s, v12.4h, v3.h[0]
751 ld1 {v12.4h},[x0],x6
769 smlsl v20.4s, v12.4h, v3.h[0]
771 smlsl v22.4s, v12.4h, v7.h[0]
773 smlal v16.4s, v12.4h, v1.h[0]
775 smlsl v18.4s, v12.4h, v5.h[0]
814 ld1 {v12.4h},[x0],x6
835 smlal v20.4s, v12.4h, v1.h[0]
837 smlsl v22.4s, v12.4h, v3.h[0]
839 smlal v16.4s, v12.4h, v5.h[0]
841 smlsl v18.4s, v12.4h, v7.h[0]
848 add v12.4s, v22.4s , v26.4s
863 sqrshrn v12.4h, v12.4s,#shift_stage1_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage1_idct)
873 trn1 v24.4h, v30.4h, v12.4h
874 trn2 v25.4h, v30.4h, v12.4h
880 trn1 v12.2s, v25.2s, v27.2s
899 st1 { v12.4h, v13.4h},[x1],#16
944 ld1 {v12.4h},[x0],x6
964 smlsl v20.4s, v12.4h, v1.h[0]
966 smlsl v22.4s, v12.4h, v3.h[0]
968 smlsl v16.4s, v12.4h, v5.h[0]
970 smlsl v18.4s, v12.4h, v7.h[0]
1012 ld1 {v12.4h},[x0],x6
1034 smlsl v20.4s, v12.4h, v3.h[0]
1036 smlal v22.4s, v12.4h, v7.h[0]
1038 smlal v16.4s, v12.4h, v1.h[0]
1040 smlal v18.4s, v12.4h, v5.h[0]
1082 ld1 {v12.4h},[x0],x6
1101 smlsl v20.4s, v12.4h, v5.h[0]
1103 smlal v22.4s, v12.4h, v1.h[0]
1105 smlsl v16.4s, v12.4h, v7.h[0]
1107 smlsl v18.4s, v12.4h, v3.h[0]
1148 ld1 {v12.4h},[x0],x6
1165 smlsl v20.4s, v12.4h, v7.h[0]
1167 smlal v22.4s, v12.4h, v5.h[0]
1169 smlsl v16.4s, v12.4h, v3.h[0]
1171 smlal v18.4s, v12.4h, v1.h[0]
1178 add v12.4s, v22.4s , v26.4s
1193 sqrshrn v12.4h, v12.4s,#shift_stage1_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage1_idct)
1203 trn1 v24.4h, v30.4h, v12.4h
1204 trn2 v25.4h, v30.4h, v12.4h
1210 trn1 v12.2s, v25.2s, v27.2s
1228 st1 { v12.4h, v13.4h},[x1],#16
1274 ld1 {v12.4h},[x0],x6
1296 smlal v20.4s, v12.4h, v7.h[0]
1298 smlal v22.4s, v12.4h, v5.h[0]
1300 smlal v16.4s, v12.4h, v3.h[0]
1302 smlal v18.4s, v12.4h, v1.h[0]
1346 ld1 {v12.4h},[x0],x6
1368 smlsl v20.4s, v12.4h, v5.h[0]
1370 smlsl v22.4s, v12.4h, v1.h[0]
1372 smlsl v16.4s, v12.4h, v7.h[0]
1374 smlal v18.4s, v12.4h, v3.h[0]
1417 ld1 {v12.4h},[x0],x6
1439 smlal v20.4s, v12.4h, v3.h[0]
1441 smlal v22.4s, v12.4h, v7.h[0]
1443 smlsl v16.4s, v12.4h, v1.h[0]
1445 smlal v18.4s, v12.4h, v5.h[0]
1486 ld1 {v12.4h},[x0],x6
1506 smlsl v20.4s, v12.4h, v1.h[0]
1508 smlal v22.4s, v12.4h, v3.h[0]
1510 smlsl v16.4s, v12.4h, v5.h[0]
1512 smlal v18.4s, v12.4h, v7.h[0]
1519 add v12.4s, v22.4s , v26.4s
1534 sqrshrn v12.4h, v12.4s,#shift_stage1_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage1_idct)
1544 trn1 v24.4h, v30.4h, v12.4h
1545 trn2 v25.4h, v30.4h, v12.4h
1551 trn1 v12.2s, v25.2s, v27.2s
1570 st1 { v12.4h, v13.4h},[x1],#16
1645 ld1 {v12.4h, v13.4h},[x1],#16
1665 smlal v20.4s, v12.4h, v1.h[0]
1667 smlal v22.4s, v12.4h, v3.h[0]
1669 smlal v16.4s, v12.4h, v5.h[0]
1671 smlal v18.4s, v12.4h, v7.h[0]
1710 ld1 {v12.4h, v13.4h},[x1],#16
1729 smlal v20.4s, v12.4h, v3.h[0]
1731 smlsl v22.4s, v12.4h, v7.h[0]
1733 smlsl v16.4s, v12.4h, v1.h[0]
1735 smlsl v18.4s, v12.4h, v5.h[0]
1773 ld1 {v12.4h, v13.4h},[x1],#16
1792 smlal v20.4s, v12.4h, v5.h[0]
1794 smlsl v22.4s, v12.4h, v1.h[0]
1796 smlal v16.4s, v12.4h, v7.h[0]
1798 smlal v18.4s, v12.4h, v3.h[0]
1835 ld1 {v12.4h, v13.4h},[x1],#16
1850 smlal v20.4s, v12.4h, v7.h[0]
1852 smlsl v22.4s, v12.4h, v5.h[0]
1854 smlal v16.4s, v12.4h, v3.h[0]
1856 smlsl v18.4s, v12.4h, v1.h[0]
1863 add v12.4s, v22.4s , v26.4s
1878 sqrshrn v12.4h, v12.4s,#shift_stage2_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage2_idct)
1889 trn1 v24.4h, v30.4h, v12.4h
1890 trn2 v25.4h, v30.4h, v12.4h
1896 trn1 v12.2s, v25.2s, v27.2s
1915 st1 { v12.4h, v13.4h},[x0],#16
1960 ld1 {v12.4h, v13.4h},[x1],#16
1976 smlsl v20.4s, v12.4h, v7.h[0]
1978 smlsl v22.4s, v12.4h, v5.h[0]
1980 smlsl v16.4s, v12.4h, v3.h[0]
1982 smlsl v18.4s, v12.4h, v1.h[0]
2026 ld1 {v12.4h, v13.4h},[x1],#16
2046 smlal v20.4s, v12.4h, v5.h[0]
2048 smlal v22.4s, v12.4h, v1.h[0]
2050 smlal v16.4s, v12.4h, v7.h[0]
2052 smlsl v18.4s, v12.4h, v3.h[0]
2091 ld1 {v12.4h, v13.4h},[x1],#16
2109 smlsl v20.4s, v12.4h, v3.h[0]
2111 smlsl v22.4s, v12.4h, v7.h[0]
2113 smlal v16.4s, v12.4h, v1.h[0]
2115 smlsl v18.4s, v12.4h, v5.h[0]
2151 ld1 {v12.4h, v13.4h},[x1],#16
2168 smlal v20.4s, v12.4h, v1.h[0]
2170 smlsl v22.4s, v12.4h, v3.h[0]
2172 smlal v16.4s, v12.4h, v5.h[0]
2174 smlsl v18.4s, v12.4h, v7.h[0]
2181 add v12.4s, v22.4s , v26.4s
2196 sqrshrn v12.4h, v12.4s,#shift_stage2_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage2_idct)
2206 trn1 v24.4h, v30.4h, v12.4h
2207 trn2 v25.4h, v30.4h, v12.4h
2213 trn1 v12.2s, v25.2s, v27.2s
2232 st1 { v12.4h, v13.4h},[x0],#16
2275 ld1 {v12.4h, v13.4h},[x1],#16
2290 smlsl v20.4s, v12.4h, v1.h[0]
2292 smlsl v22.4s, v12.4h, v3.h[0]
2294 smlsl v16.4s, v12.4h, v5.h[0]
2296 smlsl v18.4s, v12.4h, v7.h[0]
2337 ld1 {v12.4h, v13.4h},[x1],#16
2356 smlsl v20.4s, v12.4h, v3.h[0]
2358 smlal v22.4s, v12.4h, v7.h[0]
2360 smlal v16.4s, v12.4h, v1.h[0]
2362 smlal v18.4s, v12.4h, v5.h[0]
2400 ld1 {v12.4h, v13.4h},[x1],#16
2418 smlsl v20.4s, v12.4h, v5.h[0]
2420 smlal v22.4s, v12.4h, v1.h[0]
2422 smlsl v16.4s, v12.4h, v7.h[0]
2424 smlsl v18.4s, v12.4h, v3.h[0]
2459 ld1 {v12.4h, v13.4h},[x1],#16
2476 smlsl v20.4s, v12.4h, v7.h[0]
2478 smlal v22.4s, v12.4h, v5.h[0]
2480 smlsl v16.4s, v12.4h, v3.h[0]
2482 smlal v18.4s, v12.4h, v1.h[0]
2489 add v12.4s, v22.4s , v26.4s
2504 sqrshrn v12.4h, v12.4s,#shift_stage2_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage2_idct)
2514 trn1 v24.4h, v30.4h, v12.4h
2515 trn2 v25.4h, v30.4h, v12.4h
2521 trn1 v12.2s, v25.2s, v27.2s
2540 st1 { v12.4h, v13.4h},[x0],#16
2584 ld1 {v12.4h, v13.4h},[x1],#16
2604 smlal v20.4s, v12.4h, v7.h[0]
2606 smlal v22.4s, v12.4h, v5.h[0]
2608 smlal v16.4s, v12.4h, v3.h[0]
2610 smlal v18.4s, v12.4h, v1.h[0]
2652 ld1 {v12.4h, v13.4h},[x1],#16
2672 smlsl v20.4s, v12.4h, v5.h[0]
2674 smlsl v22.4s, v12.4h, v1.h[0]
2676 smlsl v16.4s, v12.4h, v7.h[0]
2678 smlal v18.4s, v12.4h, v3.h[0]
2716 ld1 {v12.4h, v13.4h},[x1],#16
2734 smlal v20.4s, v12.4h, v3.h[0]
2736 smlal v22.4s, v12.4h, v7.h[0]
2738 smlsl v16.4s, v12.4h, v1.h[0]
2740 smlal v18.4s, v12.4h, v5.h[0]
2778 ld1 {v12.4h, v13.4h},[x1],#16
2795 smlsl v20.4s, v12.4h, v1.h[0]
2797 smlal v22.4s, v12.4h, v3.h[0]
2799 smlsl v16.4s, v12.4h, v5.h[0]
2801 smlal v18.4s, v12.4h, v7.h[0]
2808 add v12.4s, v22.4s , v26.4s
2823 sqrshrn v12.4h, v12.4s,#shift_stage2_idct //// x1 = (a1 + b1 + rnd) >> 7(shift_stage2_idct)
2835 trn1 v24.4h, v30.4h, v12.4h
2836 trn2 v25.4h, v30.4h, v12.4h
2842 trn1 v12.2s, v25.2s, v27.2s
2861 st1 { v12.4h, v13.4h},[x0],#16
2872 ld1 {v12.8h},[x0],#16
2915 mov v13.d[0], v12.d[1]
2916 mov v12.d[1], v16.d[0]
2938 uaddw v12.8h, v12.8h , v8.8b
2948 sqxtun v12.8b, v12.8h
2958 st1 {v12.8b, v13.8b},[x3],x7
2967 ld1 {v12.8h},[x0],#16
2990 mov v13.d[0], v12.d[1]
2991 mov v12.d[1], v16.d[0]
3013 uaddw v12.8h, v12.8h , v8.8b
3023 sqxtun v12.8b, v12.8h
3033 st1 {v12.8b, v13.8b},[x3],x7