Lines Matching refs:r3
72 STMIA r3!, {r4-r11}
79 SUB r3, r3, r0, LSL #3
81 STR r3, [sp, #0x50]
146 LDR r3, [sp, #0x50]
148 ADD r12, r3, #8
150 MOV r3, r1, ASR #2
151 ADD r3, r3, r1, ASR #3
152 SUB r3, r3, r1, ASR #4
153 ADD r3, r3, r1, ASR #5
154 SUB r3, r3, r1, ASR #6
155 ADD r3, r3, r1, ASR #7
156 SUB r3, r3, r1, ASR #8
157 STR r3, [sp, #0x18]
159 LDR r3, [sp, #0x2c]
162 LDR r1, [r3, r4, LSL #3]! @ w1h = *(twiddles + 2*j)@
163 LDR r2, [r3, #0x04] @w1l = *(twiddles + 2*j + 1)@
164 LDR r5, [r3, r4, LSL #3]! @w2h = *(twiddles + 2*(j<<1))@
165 LDR r6, [r3, #0x04] @w2l = *(twiddles + 2*(j<<1) + 1)@
166 LDR r7, [r3, r4, LSL #3]! @w3h = *(twiddles + 2*j + 2*(j<<1))@
167 LDR r8, [r3, #0x04] @w3l = *(twiddles + 2*j + 2*(j<<1) + 1)@
187 SMULL r3, r4, r6, r2 @ixheaacd_mult32(x1r,w1l)
188 LSR r3, r3, #31
189 ORR r4, r3, r4, LSL#1
190 SMULL r3, r6, r6, r1 @mult32x16hin32(x1r,W1h)
191 LSR r3, r3, #31
192 ORR r6, r3, r6, LSL#1
193 SMULL r3, r5, r7, r1 @mult32x16hin32(x1i,W1h)
194 LSR r3, r3, #31
195 ORR r5, r3, r5, LSL#1
196 SMULL r3, r7, r7, r2 @ixheaacd_mac32(ixheaacd_mult32(x1r,w1h) ,x1i,w1l)
197 LSR r3, r3, #31
198 ORR r7, r3, r7, LSL#1
205 SMULL r3, r4, r8, r2 @ixheaacd_mult32(x2r,w2l)
206 LSR r3, r3, #31
207 ORR r4, r3, r4, LSL#1
208 SMULL r3, r8, r8, r1 @mult32x16hin32(x2r,W2h)
209 LSR r3, r3, #31
210 ORR r8, r3, r8, LSL#1
211 SMULL r3, r5, r9, r1 @mult32x16hin32(x2i,W2h)
212 LSR r3, r3, #31
213 ORR r5, r3, r5, LSL#1
214 SMULL r3, r9, r9, r2 @ixheaacd_mac32(ixheacd_mult32(x1r,w1h) ,x1i,w1l)
215 LSR r3, r3, #31
216 ORR r9, r3, r9, LSL#1
223 SMULL r3, r4, r10, r2 @ixheaacd_mult32(x3r,w3l)
224 LSR r3, r3, #31
225 ORR r4, r3, r4, LSL#1
226 SMULL r3, r10, r10, r1 @mult32x16hin32(x3r,W3h)
227 LSR r3, r3, #31
228 ORR r10, r3, r10, LSL#1
229 SMULL r3, r5, r11, r1 @mult32x16hin32(x3i,W3h)
230 LSR r3, r3, #31
231 ORR r5, r3, r5, LSL#1
232 SMULL r3, r11, r11, r2 @ixheaacd_mac32(ixheacd_mult32(x3r,w3h) ,x3i,w3l)
233 LSR r3, r3, #31
234 ORR r11, r3, r11, LSL#1
286 LDR r3, [sp, #0x2c]
290 LDR r1, [r3, r4, LSL #3]! @ w1h = *(twiddles + 2*j)@
291 LDR r2, [r3, #0x04] @w1l = *(twiddles + 2*j + 1)@
292 LDR r5, [r3, r4, LSL #3]! @w2h = *(twiddles + 2*(j<<1))@
293 LDR r6, [r3, #0x04] @w2l = *(twiddles + 2*(j<<1) + 1)@
294 SUB r3, r3, #2048 @ 512 *4
295 LDR r7, [r3, r4, LSL #3]! @w3h = *(twiddles + 2*j + 2*(j<<1))@
296 LDR r8, [r3, #0x04] @w3l = *(twiddles + 2*j + 2*(j<<1) + 1)@
315 SMULL r3, r4, r6, r2 @ixheaacd_mult32(x1r,w1l)
316 LSR r3, r3, #31
317 ORR r4, r3, r4, LSL#1
318 SMULL r3, r6, r6, r1 @mult32x16hin32(x1r,W1h)
319 LSR r3, r3, #31
320 ORR r6, r3, r6, LSL#1
321 SMULL r3, r5, r7, r1 @mult32x16hin32(x1i,W1h)
322 LSR r3, r3, #31
323 ORR r5, r3, r5, LSL#1
324 SMULL r3, r7, r7, r2 @ixheaacd_mac32(ixheaacd_mult32(x1r,w1h) ,x1i,w1l)
325 LSR r3, r3, #31
326 ORR r7, r3, r7, LSL#1
333 SMULL r3, r4, r8, r2 @ixheaacd_mult32(x2r,w2l)
334 LSR r3, r3, #31
335 ORR r4, r3, r4, LSL#1
336 SMULL r3, r8, r8, r1 @mult32x16hin32(x2r,W2h)
337 LSR r3, r3, #31
338 ORR r8, r3, r8, LSL#1
339 SMULL r3, r5, r9, r1 @mult32x16hin32(x2i,W2h)
340 LSR r3, r3, #31
341 ORR r5, r3, r5, LSL#1
342 SMULL r3, r9, r9, r2 @ixheaacd_mac32(ixheacd_mult32(x1r,w1h) ,x1i,w1l)
343 LSR r3, r3, #31
344 ORR r9, r3, r9, LSL#1
351 SMULL r3, r4, r10, r2 @ixheaacd_mult32(x3r,w3l)
352 LSR r3, r3, #31
353 ORR r4, r3, r4, LSL#1
354 SMULL r3, r10, r10, r1 @mult32x16hin32(x3r,W3h)
355 LSR r3, r3, #31
356 ORR r10, r3, r10, LSL#1
357 SMULL r3, r5, r11, r1 @mult32x16hin32(x3i,W3h)
358 LSR r3, r3, #31
359 ORR r5, r3, r5, LSL#1
360 SMULL r3, r11, r11, r2 @ixheaacd_mac32(ixheacd_mult32(x3r,w3h) ,x3i,w3l)
361 LSR r3, r3, #31
362 ORR r11, r3, r11, LSL#1
417 LDR r3, [sp, #0x2c]
421 LDR r1, [r3, r4, LSL #3]! @ w1h = *(twiddles + 2*j)@
422 LDR r2, [r3, #0x04] @w1l = *(twiddles + 2*j + 1)@
423 SUB r3, r3, #2048 @ 512 *4
424 LDR r5, [r3, r4, LSL #3]! @w2h = *(twiddles + 2*(j<<1))@
425 LDR r6, [r3, #0x04] @w2l = *(twiddles + 2*(j<<1) + 1)@
426 LDR r7, [r3, r4, LSL #3]! @w3h = *(twiddles + 2*j + 2*(j<<1))@
427 LDR r8, [r3, #0x04] @w3l = *(twiddles + 2*j + 2*(j<<1) + 1)@
447 SMULL r3, r4, r6, r2 @ixheaacd_mult32(x1r,w1l)
448 LSR r3, r3, #31
449 ORR r4, r3, r4, LSL#1
450 SMULL r3, r6, r6, r1 @mult32x16hin32(x1r,W1h)
451 LSR r3, r3, #31
452 ORR r6, r3, r6, LSL#1
453 SMULL r3, r5, r7, r1 @mult32x16hin32(x1i,W1h)
454 LSR r3, r3, #31
455 ORR r5, r3, r5, LSL#1
456 SMULL r3, r7, r7, r2 @ixheaacd_mac32(ixheaacd_mult32(x1r,w1h) ,x1i,w1l)
457 LSR r3, r3, #31
458 ORR r7, r3, r7, LSL#1
465 SMULL r3, r4, r8, r2 @ixheaacd_mult32(x2r,w2l)
466 LSR r3, r3, #31
467 ORR r4, r3, r4, LSL#1
468 SMULL r3, r8, r8, r1 @mult32x16hin32(x2r,W2h)
469 LSR r3, r3, #31
470 ORR r8, r3, r8, LSL#1
471 SMULL r3, r5, r9, r1 @mult32x16hin32(x2i,W2h)
472 LSR r3, r3, #31
473 ORR r5, r3, r5, LSL#1
474 SMULL r3, r9, r9, r2 @ixheaacd_mac32(ixheacd_mult32(x1r,w1h) ,x1i,w1l)
475 LSR r3, r3, #31
476 ORR r9, r3, r9, LSL#1
483 SMULL r3, r4, r10, r2 @ixheaacd_mult32(x3r,w3l)
484 LSR r3, r3, #31
485 ORR r4, r3, r4, LSL#1
486 SMULL r3, r10, r10, r1 @mult32x16hin32(x3r,W3h)
487 LSR r3, r3, #31
488 ORR r10, r3, r10, LSL#1
489 SMULL r3, r5, r11, r1 @mult32x16hin32(x3i,W3h)
490 LSR r3, r3, #31
491 ORR r5, r3, r5, LSL#1
492 SMULL r3, r11, r11, r2 @ixheaacd_mac32(ixheacd_mult32(x3r,w3h) ,x3i,w3l)
493 LSR r3, r3, #31
494 ORR r11, r3, r11, LSL#1
546 LDR r3, [sp, #0x2c]
550 LDR r1, [r3, r4, LSL #3]! @ w1h = *(twiddles + 2*j)@
551 LDR r2, [r3, #0x04] @w1l = *(twiddles + 2*j + 1)@
552 SUB r3, r3, #2048 @ 512 *4
553 LDR r5, [r3, r4, LSL #3]! @w2h = *(twiddles + 2*(j<<1))@
554 LDR r6, [r3, #0x04] @w2l = *(twiddles + 2*(j<<1) + 1)@
555 SUB r3, r3, #2048 @ 512 *4
556 LDR r7, [r3, r4, LSL #3]! @w3h = *(twiddles + 2*j + 2*(j<<1))@
557 LDR r8, [r3, #0x04] @w3l = *(twiddles + 2*j + 2*(j<<1) + 1)@
577 SMULL r3, r4, r6, r2 @ixheaacd_mult32(x1r,w1l)
578 LSR r3, r3, #31
579 ORR r4, r3, r4, LSL#1
580 SMULL r3, r6, r6, r1 @mult32x16hin32(x1r,W1h)
581 LSR r3, r3, #31
582 ORR r6, r3, r6, LSL#1
583 SMULL r3, r5, r7, r1 @mult32x16hin32(x1i,W1h)
584 LSR r3, r3, #31
585 ORR r5, r3, r5, LSL#1
586 SMULL r3, r7, r7, r2 @ixheaacd_mac32(ixheaacd_mult32(x1r,w1h) ,x1i,w1l)
587 LSR r3, r3, #31
588 ORR r7, r3, r7, LSL#1
595 SMULL r3, r4, r8, r2 @ixheaacd_mult32(x2r,w2l)
596 LSR r3, r3, #31
597 ORR r4, r3, r4, LSL#1
598 SMULL r3, r8, r8, r1 @mult32x16hin32(x2r,W2h)
599 LSR r3, r3, #31
600 ORR r8, r3, r8, LSL#1
601 SMULL r3, r5, r9, r1 @mult32x16hin32(x2i,W2h)
602 LSR r3, r3, #31
603 ORR r5, r3, r5, LSL#1
604 SMULL r3, r9, r9, r2 @ixheaacd_mac32(ixheacd_mult32(x1r,w1h) ,x1i,w1l)
605 LSR r3, r3, #31
606 ORR r9, r3, r9, LSL#1
613 SMULL r3, r4, r10, r2 @ixheaacd_mult32(x3r,w3l)
614 LSR r3, r3, #31
615 ORR r4, r3, r4, LSL#1
616 SMULL r3, r10, r10, r1 @mult32x16hin32(x3r,W3h)
617 LSR r3, r3, #31
618 ORR r10, r3, r10, LSL#1
619 SMULL r3, r5, r11, r1 @mult32x16hin32(x3i,W3h)
620 LSR r3, r3, #31
621 ORR r5, r3, r5, LSL#1
622 SMULL r3, r11, r11, r2 @ixheaacd_mac32(ixheacd_mult32(x3r,w3h) ,x3i,w3l)
623 LSR r3, r3, #31
624 ORR r11, r3, r11, LSL#1
697 MOVS r3, r0
700 MOV r3, r3, ASR #1
711 SUBS r3, r3, #1
753 MOV r3, r0, ASR #4
762 SUBS r3, r3, #1