Lines Matching refs:Reg
60 unsigned AggressiveAntiDepState::GetGroup(unsigned Reg) { in GetGroup() argument
61 unsigned Node = GroupNodeIndices[Reg]; in GetGroup()
73 for (unsigned Reg = 0; Reg != NumTargetRegs; ++Reg) { in GetGroupRegs() local
74 if ((GetGroup(Reg) == Group) && (RegRefs->count(Reg) > 0)) in GetGroupRegs()
75 Regs.push_back(Reg); in GetGroupRegs()
95 unsigned AggressiveAntiDepState::LeaveGroup(unsigned Reg) in LeaveGroup() argument
102 GroupNodeIndices[Reg] = idx; in LeaveGroup()
106 bool AggressiveAntiDepState::IsLive(unsigned Reg) in IsLive() argument
110 return((KillIndices[Reg] != ~0u) && (DefIndices[Reg] == ~0u)); in IsLive()
154 unsigned Reg = *AI; in StartBlock() local
155 State->UnionGroups(Reg, 0); in StartBlock()
156 KillIndices[Reg] = BB->size(); in StartBlock()
157 DefIndices[Reg] = ~0u; in StartBlock()
167 unsigned Reg = *I; in StartBlock() local
168 if (!IsReturnBlock && !Pristine.test(Reg)) continue; in StartBlock()
169 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in StartBlock()
197 for (unsigned Reg = 0; Reg != TRI->getNumRegs(); ++Reg) { in Observe() local
204 if (State->IsLive(Reg)) { in Observe()
205 DEBUG(if (State->GetGroup(Reg) != 0) in Observe()
206 dbgs() << " " << TRI->getName(Reg) << "=g" << in Observe()
207 State->GetGroup(Reg) << "->g0(region live-out)"); in Observe()
208 State->UnionGroups(Reg, 0); in Observe()
209 } else if ((DefIndices[Reg] < InsertPosIndex) in Observe()
210 && (DefIndices[Reg] >= Count)) { in Observe()
211 DefIndices[Reg] = Count; in Observe()
222 unsigned Reg = MO.getReg(); in IsImplicitDefUse() local
223 if (Reg == 0) in IsImplicitDefUse()
228 Op = MI.findRegisterUseOperand(Reg, true); in IsImplicitDefUse()
230 Op = MI.findRegisterDefOperand(Reg); in IsImplicitDefUse()
242 const unsigned Reg = MO.getReg(); in GetPassthruRegs() local
243 for (MCSubRegIterator SubRegs(Reg, TRI, /*IncludeSelf=*/true); in GetPassthruRegs()
288 void AggressiveAntiDepBreaker::HandleLastUse(unsigned Reg, unsigned KillIdx, in HandleLastUse() argument
301 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) in HandleLastUse()
302 if (TRI->isSuperRegister(Reg, *AI) && State->IsLive(*AI)) { in HandleLastUse()
307 if (!State->IsLive(Reg)) { in HandleLastUse()
308 KillIndices[Reg] = KillIdx; in HandleLastUse()
309 DefIndices[Reg] = ~0u; in HandleLastUse()
310 RegRefs.erase(Reg); in HandleLastUse()
311 State->LeaveGroup(Reg); in HandleLastUse()
313 dbgs() << header << TRI->getName(Reg); header = nullptr; }); in HandleLastUse()
314 DEBUG(dbgs() << "->g" << State->GetGroup(Reg) << tag); in HandleLastUse()
319 for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) { in HandleLastUse()
327 dbgs() << header << TRI->getName(Reg); header = nullptr; }); in HandleLastUse()
351 unsigned Reg = MO.getReg(); in PrescanInstruction() local
352 if (Reg == 0) continue; in PrescanInstruction()
354 HandleLastUse(Reg, Count + 1, "", "\tDead Def: ", "\n"); in PrescanInstruction()
361 unsigned Reg = MO.getReg(); in PrescanInstruction() local
362 if (Reg == 0) continue; in PrescanInstruction()
364 DEBUG(dbgs() << " " << TRI->getName(Reg) << "=g" << State->GetGroup(Reg)); in PrescanInstruction()
373 DEBUG(if (State->GetGroup(Reg) != 0) dbgs() << "->g0(alloc-req)"); in PrescanInstruction()
374 State->UnionGroups(Reg, 0); in PrescanInstruction()
379 for (MCRegAliasIterator AI(Reg, TRI, false); AI.isValid(); ++AI) { in PrescanInstruction()
382 State->UnionGroups(Reg, AliasReg); in PrescanInstruction()
383 DEBUG(dbgs() << "->g" << State->GetGroup(Reg) << "(via " << in PrescanInstruction()
393 RegRefs.insert(std::make_pair(Reg, RR)); in PrescanInstruction()
403 unsigned Reg = MO.getReg(); in PrescanInstruction() local
404 if (Reg == 0) continue; in PrescanInstruction()
406 if (MI.isKill() || (PassthruRegs.count(Reg) != 0)) in PrescanInstruction()
410 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI) { in PrescanInstruction()
417 if (TRI->isSuperRegister(Reg, *AI) && State->IsLive(*AI)) in PrescanInstruction()
456 unsigned Reg = MO.getReg(); in ScanInstruction() local
457 if (Reg == 0) continue; in ScanInstruction()
459 DEBUG(dbgs() << " " << TRI->getName(Reg) << "=g" << in ScanInstruction()
460 State->GetGroup(Reg)); in ScanInstruction()
465 HandleLastUse(Reg, Count, "(last-use)"); in ScanInstruction()
468 DEBUG(if (State->GetGroup(Reg) != 0) dbgs() << "->g0(alloc-req)"); in ScanInstruction()
469 State->UnionGroups(Reg, 0); in ScanInstruction()
477 RegRefs.insert(std::make_pair(Reg, RR)); in ScanInstruction()
491 unsigned Reg = MO.getReg(); in ScanInstruction() local
492 if (Reg == 0) continue; in ScanInstruction()
495 DEBUG(dbgs() << "=" << TRI->getName(Reg)); in ScanInstruction()
496 State->UnionGroups(FirstReg, Reg); in ScanInstruction()
498 DEBUG(dbgs() << " " << TRI->getName(Reg)); in ScanInstruction()
499 FirstReg = Reg; in ScanInstruction()
507 BitVector AggressiveAntiDepBreaker::GetRenameRegisters(unsigned Reg) { in GetRenameRegisters() argument
514 for (const auto &Q : make_range(State->GetRegRefs().equal_range(Reg))) { in GetRenameRegisters()
558 unsigned Reg = Regs[i]; in FindSuitableFreeRegisters() local
559 if ((SuperReg == 0) || TRI->isSuperRegister(SuperReg, Reg)) in FindSuitableFreeRegisters()
560 SuperReg = Reg; in FindSuitableFreeRegisters()
563 if (RegRefs.count(Reg) > 0) { in FindSuitableFreeRegisters()
564 DEBUG(dbgs() << "\t\t" << TRI->getName(Reg) << ":"); in FindSuitableFreeRegisters()
566 BitVector &BV = RenameRegisterMap[Reg]; in FindSuitableFreeRegisters()
568 BV = GetRenameRegisters(Reg); in FindSuitableFreeRegisters()
581 unsigned Reg = Regs[i]; in FindSuitableFreeRegisters() local
582 if (Reg == SuperReg) continue; in FindSuitableFreeRegisters()
583 bool IsSub = TRI->isSubRegister(SuperReg, Reg); in FindSuitableFreeRegisters()
643 unsigned Reg = Regs[i]; in FindSuitableFreeRegisters() local
645 if (Reg == SuperReg) { in FindSuitableFreeRegisters()
648 unsigned NewSubRegIdx = TRI->getSubRegIndex(SuperReg, Reg); in FindSuitableFreeRegisters()
656 if (!RenameRegisterMap[Reg].test(NewReg)) { in FindSuitableFreeRegisters()
665 if (State->IsLive(NewReg) || (KillIndices[Reg] > DefIndices[NewReg])) { in FindSuitableFreeRegisters()
673 (KillIndices[Reg] > DefIndices[AliasReg])) { in FindSuitableFreeRegisters()
685 for (const auto &Q : make_range(RegRefs.equal_range(Reg))) { in FindSuitableFreeRegisters()
700 for (const auto &Q : make_range(RegRefs.equal_range(Reg))) { in FindSuitableFreeRegisters()
712 RenameMap.insert(std::pair<unsigned, unsigned>(Reg, NewReg)); in FindSuitableFreeRegisters()
783 for (unsigned Reg = 0; Reg < TRI->getNumRegs(); ++Reg) { in BreakAntiDependencies() local
784 if (!State->IsLive(Reg)) in BreakAntiDependencies()
785 DEBUG(dbgs() << " " << TRI->getName(Reg)); in BreakAntiDependencies()