Lines Matching refs:BrCond

127       SmallVector<MachineOperand, 4> BrCond;  member
455 if (!TII->ReverseBranchCondition(BBI.BrCond)) { in ReverseBranchCondition()
457 TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl); in ReverseBranchCondition()
517 if (TrueBBI.TrueBB && TrueBBI.BrCond.empty()) in ValidTriangle()
656 BBI.BrCond.clear(); in ScanInstructions()
658 !TII->analyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond); in ScanInstructions()
661 if (BBI.BrCond.size()) { in ScanInstructions()
779 if (BBI.BrCond.size()) { in FeasibilityAnalysis()
785 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in FeasibilityAnalysis()
832 if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) { in AnalyzeBlock()
873 RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in AnalyzeBlock()
890 FeasibilityAnalysis(TrueBBI, BBI.BrCond) && in AnalyzeBlock()
908 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) { in AnalyzeBlock()
924 FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) { in AnalyzeBlock()
933 FeasibilityAnalysis(TrueBBI, BBI.BrCond)) { in AnalyzeBlock()
1117 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertSimple()
1204 SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertTriangle()
1282 SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(), in IfConvertTriangle()
1283 CvtBBI->BrCond.end()); in IfConvertTriangle()
1375 SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end()); in IfConvertDiamond()
1378 SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond; in IfConvertDiamond()