Lines Matching refs:isTop

1829   unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle);  in getLatencyStallCycles()
1844 if (!isTop()) in getNextResourceCycle()
2006 if (isTop()) in bumpCycle()
2068 if (!isTop() && SU->isCall) { in bumpNode()
2083 unsigned ReadyCycle = (isTop() ? SU->TopReadyCycle : SU->BotReadyCycle); in bumpNode()
2145 if (isTop()) { in bumpNode()
2156 unsigned &TopLatency = isTop() ? ExpectedLatency : DependentLatency; in bumpNode()
2157 unsigned &BotLatency = isTop() ? DependentLatency : ExpectedLatency; in bumpNode()
2204 unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle; in releasePending()
2504 if (Zone.isTop()) { in tryLatency()
2716 static unsigned getWeakLeft(const SUnit *SU, bool isTop) { in getWeakLeft() argument
2717 return (isTop) ? SU->WeakPredsLeft : SU->WeakSuccsLeft; in getWeakLeft()
2727 static int biasPhysRegCopy(const SUnit *SU, bool isTop) { in biasPhysRegCopy() argument
2732 unsigned ScheduledOper = isTop ? 1 : 0; in biasPhysRegCopy()
2733 unsigned UnscheduledOper = isTop ? 0 : 1; in biasPhysRegCopy()
2741 bool AtBoundary = isTop ? !SU->NumSuccsLeft : !SU->NumPredsLeft; in biasPhysRegCopy()
2899 if ((Zone->isTop() && TryCand.SU->NodeNum < Cand.SU->NodeNum) in tryCandidate()
2900 || (!Zone->isTop() && TryCand.SU->NodeNum > Cand.SU->NodeNum)) { in tryCandidate()
2922 initCandidate(TryCand, *I, Zone.isTop(), RPTracker, TempTracker); in pickNodeFromQueue()
3060 void GenericScheduler::reschedulePhysRegCopies(SUnit *SU, bool isTop) { in reschedulePhysRegCopies() argument
3063 if (!isTop) in reschedulePhysRegCopies()
3065 SmallVectorImpl<SDep> &Deps = isTop ? SU->Preds : SU->Succs; in reschedulePhysRegCopies()
3074 if (isTop ? DepSU->Succs.size() > 1 : DepSU->Preds.size() > 1) in reschedulePhysRegCopies()