Lines Matching refs:IntvOut
1272 unsigned IntvOut, SlotIndex EnterAfter){ in splitLiveThroughBlock() argument
1278 << ", live-through " << IntvIn << " -> " << IntvOut); in splitLiveThroughBlock()
1280 assert((IntvIn || IntvOut) && "Use splitSingleBlock for isolated blocks"); in splitLiveThroughBlock()
1288 if (!IntvOut) { in splitLiveThroughBlock()
1309 selectIntv(IntvOut); in splitLiveThroughBlock()
1316 if (IntvIn == IntvOut && !LeaveBefore && !EnterAfter) { in splitLiveThroughBlock()
1322 selectIntv(IntvOut); in splitLiveThroughBlock()
1329 assert((!IntvOut || !EnterAfter || EnterAfter < LSP) && "Impossible intf"); in splitLiveThroughBlock()
1331 if (IntvIn != IntvOut && (!LeaveBefore || !EnterAfter || in splitLiveThroughBlock()
1339 selectIntv(IntvOut); in splitLiveThroughBlock()
1362 selectIntv(IntvOut); in splitLiveThroughBlock()
1467 unsigned IntvOut, SlotIndex EnterAfter) { in splitRegOutBlock() argument
1473 << ", reg-out " << IntvOut << ", enter after " << EnterAfter in splitRegOutBlock()
1478 assert(IntvOut && "Must have register out"); in splitRegOutBlock()
1489 selectIntv(IntvOut); in splitRegOutBlock()
1501 selectIntv(IntvOut); in splitRegOutBlock()
1517 selectIntv(IntvOut); in splitRegOutBlock()