79   LiveIntervals *LIS;  member in __anon1b40b28f0111::TwoAddressInstructionPass
182 static bool isPlainlyKilled(MachineInstr *MI, unsigned Reg, LiveIntervals *LIS);
223   if (LIS) {  in sink3AddrInstruction()
224     LiveInterval &LI = LIS->getInterval(SavedReg);  in sink3AddrInstruction()
228     SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot();  in sink3AddrInstruction()
234     KillMI = LIS->getInstructionFromIndex(I->end);  in sink3AddrInstruction()
280       if (MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS))) {  in sink3AddrInstruction()
293   if (!LIS) {  in sink3AddrInstruction()
307   if (LIS)  in sink3AddrInstruction()
308     LIS->handleMove(*MI);  in sink3AddrInstruction()
401                             LiveIntervals *LIS) {  in isPlainlyKilled()  argument
402   if (LIS && TargetRegisterInfo::isVirtualRegister(Reg) &&  in isPlainlyKilled()
403       !LIS->isNotInMIMap(*MI)) {  in isPlainlyKilled()
410     LiveInterval &LI = LIS->getInterval(Reg);  in isPlainlyKilled()
416     SlotIndex useIdx = LIS->getInstructionIndex(*MI);  in isPlainlyKilled()
445                      LiveIntervals *LIS,  in isKilled()  argument
453     if (!isPlainlyKilled(DefMI, Reg, LIS))  in isKilled()
569   if (!isPlainlyKilled(MI, regC, LIS))  in isProfitableToCommute()
707   if (LIS)  in convertInstTo3Addr()
708     LIS->ReplaceMachineInstrInMaps(*mi, *NewMI);  in convertInstTo3Addr()
821   if (!LV && !LIS)  in rescheduleMIBelowKill()
831   if (LIS) {  in rescheduleMIBelowKill()
832     LiveInterval &LI = LIS->getInterval(Reg);  in rescheduleMIBelowKill()
836     SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot();  in rescheduleMIBelowKill()
842     KillMI = LIS->getInstructionFromIndex(I->end);  in rescheduleMIBelowKill()
881                            (LIS && isPlainlyKilled(MI, MOReg, LIS))))  in rescheduleMIBelowKill()
930             MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS));  in rescheduleMIBelowKill()
951   if (LIS) {  in rescheduleMIBelowKill()
957       LIS->handleMove(*CopyMI);  in rescheduleMIBelowKill()
968   if (LIS) {  in rescheduleMIBelowKill()
969     LIS->handleMove(*MI);  in rescheduleMIBelowKill()
1008   if (!LV && !LIS)  in rescheduleKillAboveMI()
1018   if (LIS) {  in rescheduleKillAboveMI()
1019     LiveInterval &LI = LIS->getInterval(Reg);  in rescheduleKillAboveMI()
1023     SlotIndex MBBEndIdx = LIS->getMBBEndIdx(MBB).getPrevSlot();  in rescheduleKillAboveMI()
1029     KillMI = LIS->getInstructionFromIndex(I->end);  in rescheduleKillAboveMI()
1058       bool isKill = MO.isKill() || (LIS && isPlainlyKilled(KillMI, MOReg, LIS));  in rescheduleKillAboveMI()
1101             !(MO.isKill() || (LIS && isPlainlyKilled(&OtherMI, MOReg, LIS))))  in rescheduleKillAboveMI()
1135   if (LIS) {  in rescheduleKillAboveMI()
1136     LIS->handleMove(*KillMI);  in rescheduleKillAboveMI()
1182         !BaseOpKilled && isKilled(*MI, OtherOpReg, MRI, TII, LIS, false);  in tryInstructionCommute()
1222   bool regBKilled = isKilled(MI, regB, MRI, TII, LIS, true);  in tryInstructionTransform()
1254     regBKilled = isKilled(MI, regB, MRI, TII, LIS, true);  in tryInstructionTransform()
1367           if (LIS) {  in tryInstructionTransform()
1377           if (LIS) {  in tryInstructionTransform()
1380             LIS->repairIntervalsInRange(MBB, Begin, End, OrigRegs);  in tryInstructionTransform()
1519     if (LIS) {  in processTiedPairs()
1520       LastCopyIdx = LIS->InsertMachineInstrInMaps(*PrevMI).getRegSlot();  in processTiedPairs()
1523         LiveInterval &LI = LIS->getInterval(RegA);  in processTiedPairs()
1524         VNInfo *VNI = LI.getNextValue(LastCopyIdx, LIS->getVNInfoAllocator());  in processTiedPairs()
1526             LIS->getInstructionIndex(*MI).getRegSlot(IsEarlyClobber);  in processTiedPairs()
1579     if (LIS) {  in processTiedPairs()
1580       LiveInterval &LI = LIS->getInterval(RegB);  in processTiedPairs()
1581       SlotIndex MIIdx = LIS->getInstructionIndex(*MI);  in processTiedPairs()
1613   LIS = getAnalysisIfAvailable<LiveIntervals>();  in runOnMachineFunction()
1712   if (LIS)  in runOnMachineFunction()
1741   if (LIS) {  in eliminateRegSequence()
1804   if (LIS)  in eliminateRegSequence()
1805     LIS->repairIntervalsInRange(MBB, MBBI, EndMBBI, OrigRegs);  in eliminateRegSequence()