2561   bool Src1IsKill = hasTrivialKill(Src1Val);  in optimizeSelect()  local
2569     Src1Reg = emitLogicalOp_ri(ISD::XOR, MVT::i32, Src1Reg, Src1IsKill, 1);  in optimizeSelect()
2570     Src1IsKill = true;  in optimizeSelect()
2573                                        Src1IsKill, Src2Reg, Src2IsKill);  in optimizeSelect()
2689   bool Src1IsKill = hasTrivialKill(SI->getTrueValue());  in selectSelect()  local
2698     Src2Reg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,  in selectSelect()
2702   unsigned ResultReg = fastEmitInst_rri(Opc, RC, Src1Reg, Src1IsKill, Src2Reg,  in selectSelect()
4490   bool Src1IsKill = hasTrivialKill(I->getOperand(1));  in selectRem()  local
4500                                         Src1Reg, Src1IsKill, Src0Reg,  in selectRem()
4568   bool Src1IsKill = hasTrivialKill(I->getOperand(1));  in selectMul()  local
4570   unsigned ResultReg = emitMul_rr(VT, Src0Reg, Src0IsKill, Src1Reg, Src1IsKill);  in selectMul()