36 class AArch64DAGToDAGISel : public SelectionDAGISel {  class
45   explicit AArch64DAGToDAGISel(AArch64TargetMachine &tm,  in AArch64DAGToDAGISel()  function in __anonec6fe5f10111::AArch64DAGToDAGISel
233 bool AArch64DAGToDAGISel::SelectInlineAsmMemoryOperand(  in SelectInlineAsmMemoryOperand()
253 bool AArch64DAGToDAGISel::SelectArithImmed(SDValue N, SDValue &Val,  in SelectArithImmed()
283 bool AArch64DAGToDAGISel::SelectNegArithImmed(SDValue N, SDValue &Val,  in SelectNegArithImmed()
332 bool AArch64DAGToDAGISel::isWorthFolding(SDValue V) const {  in isWorthFolding()
343 bool AArch64DAGToDAGISel::SelectShiftedRegister(SDValue N, bool AllowROR,  in SelectShiftedRegister()
457 bool AArch64DAGToDAGISel::tryMLAV64LaneV128(SDNode *N) {  in tryMLAV64LaneV128()
502 bool AArch64DAGToDAGISel::tryMULLV64LaneV128(unsigned IntNo, SDNode *N) {  in tryMULLV64LaneV128()
565 bool AArch64DAGToDAGISel::SelectArithExtendedRegister(SDValue N, SDValue &Reg,  in SelectArithExtendedRegister()
627 bool AArch64DAGToDAGISel::SelectAddrModeIndexed7S(SDValue N, unsigned Size,  in SelectAddrModeIndexed7S()
672 bool AArch64DAGToDAGISel::SelectAddrModeIndexed(SDValue N, unsigned Size,  in SelectAddrModeIndexed()
737 bool AArch64DAGToDAGISel::SelectAddrModeUnscaled(SDValue N, unsigned Size,  in SelectAddrModeUnscaled()
775 bool AArch64DAGToDAGISel::SelectExtendedSHL(SDValue N, unsigned Size,  in SelectExtendedSHL()
807 bool AArch64DAGToDAGISel::SelectAddrModeWRO(SDValue N, unsigned Size,  in SelectAddrModeWRO()
896 bool AArch64DAGToDAGISel::SelectAddrModeXRO(SDValue N, unsigned Size,  in SelectAddrModeXRO()
972 SDValue AArch64DAGToDAGISel::createDTuple(ArrayRef<SDValue> Regs) {  in createDTuple()
981 SDValue AArch64DAGToDAGISel::createQTuple(ArrayRef<SDValue> Regs) {  in createQTuple()
990 SDValue AArch64DAGToDAGISel::createTuple(ArrayRef<SDValue> Regs,  in createTuple()
1019 void AArch64DAGToDAGISel::SelectTable(SDNode *N, unsigned NumVecs, unsigned Opc,  in SelectTable()
1040 bool AArch64DAGToDAGISel::tryIndexedLoad(SDNode *N) {  in tryIndexedLoad()
1134 void AArch64DAGToDAGISel::SelectLoad(SDNode *N, unsigned NumVecs, unsigned Opc,  in SelectLoad()
1155 void AArch64DAGToDAGISel::SelectPostLoad(SDNode *N, unsigned NumVecs,  in SelectPostLoad()
1187 void AArch64DAGToDAGISel::SelectStore(SDNode *N, unsigned NumVecs,  in SelectStore()
1203 void AArch64DAGToDAGISel::SelectPostStore(SDNode *N, unsigned NumVecs,  in SelectPostStore()
1259 void AArch64DAGToDAGISel::SelectLoadLane(SDNode *N, unsigned NumVecs,  in SelectLoadLane()
1298 void AArch64DAGToDAGISel::SelectPostLoadLane(SDNode *N, unsigned NumVecs,  in SelectPostLoadLane()
1353 void AArch64DAGToDAGISel::SelectStoreLane(SDNode *N, unsigned NumVecs,  in SelectStoreLane()
1383 void AArch64DAGToDAGISel::SelectPostStoreLane(SDNode *N, unsigned NumVecs,  in SelectPostStoreLane()
1654 bool AArch64DAGToDAGISel::tryBitfieldExtractOpFromSExt(SDNode *N) {  in tryBitfieldExtractOpFromSExt()
1719 bool AArch64DAGToDAGISel::tryBitfieldExtractOp(SDNode *N) {  in tryBitfieldExtractOp()
2297 bool AArch64DAGToDAGISel::tryBitfieldInsertOp(SDNode *N) {  in tryBitfieldInsertOp()
2319 bool AArch64DAGToDAGISel::tryBitfieldInsertInZeroOp(SDNode *N) {  in tryBitfieldInsertInZeroOp()
2347 AArch64DAGToDAGISel::SelectCVTFixedPosOperand(SDValue N, SDValue &FixedPos,  in SelectCVTFixedPosOperand()
2425 bool AArch64DAGToDAGISel::tryReadRegister(SDNode *N) {  in tryReadRegister()
2463 bool AArch64DAGToDAGISel::tryWriteRegister(SDNode *N) {  in tryWriteRegister()
2525 void AArch64DAGToDAGISel::SelectCMP_SWAP(SDNode *N) {  in SelectCMP_SWAP()
2555 void AArch64DAGToDAGISel::Select(SDNode *Node) {  in Select()
3920   return new AArch64DAGToDAGISel(TM, OptLevel);  in createAArch64ISelDag()