Lines Matching refs:RegSeq
1030 SDValue RegSeq = createQTuple(Regs); in SelectTable() local
1035 Ops.push_back(RegSeq); in SelectTable()
1195 SDValue RegSeq = Is128Bit ? createQTuple(Regs) : createDTuple(Regs); in SelectStore() local
1197 SDValue Ops[] = {RegSeq, N->getOperand(NumVecs + 2), N->getOperand(0)}; in SelectStore()
1213 SDValue RegSeq = Is128Bit ? createQTuple(Regs) : createDTuple(Regs); in SelectPostStore() local
1215 SDValue Ops[] = {RegSeq, in SelectPostStore()
1272 SDValue RegSeq = createQTuple(Regs); in SelectLoadLane() local
1279 SDValue Ops[] = {RegSeq, CurDAG->getTargetConstant(LaneNo, dl, MVT::i64), in SelectLoadLane()
1284 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectLoadLane()
1311 SDValue RegSeq = createQTuple(Regs); in SelectPostLoadLane() local
1314 RegSeq->getValueType(0), MVT::Other}; in SelectPostLoadLane()
1319 SDValue Ops[] = {RegSeq, in SelectPostLoadLane()
1336 EVT WideVT = RegSeq.getOperand(1)->getValueType(0); in SelectPostLoadLane()
1366 SDValue RegSeq = createQTuple(Regs); in SelectStoreLane() local
1371 SDValue Ops[] = {RegSeq, CurDAG->getTargetConstant(LaneNo, dl, MVT::i64), in SelectStoreLane()
1396 SDValue RegSeq = createQTuple(Regs); in SelectPostStoreLane() local
1404 SDValue Ops[] = {RegSeq, CurDAG->getTargetConstant(LaneNo, dl, MVT::i64), in SelectPostStoreLane()