Lines Matching refs:SL
784 const StructLayout *SL = TD.getStructLayout(ST); in LowerConstantInitializer() local
790 SDValue Offset = DAG.getConstant(SL->getElementOffset(I), DL, PtrVT); in LowerConstantInitializer()
1029 SDLoc SL(Op); in split64BitValue() local
1031 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in split64BitValue()
1033 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in split64BitValue()
1034 const SDValue One = DAG.getConstant(1, SL, MVT::i32); in split64BitValue()
1036 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in split64BitValue()
1037 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One); in split64BitValue()
1043 SDLoc SL(Op); in getLoHalf64() local
1045 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in getLoHalf64()
1046 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in getLoHalf64()
1047 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in getLoHalf64()
1051 SDLoc SL(Op); in getHiHalf64() local
1053 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Op); in getHiHalf64()
1054 const SDValue One = DAG.getConstant(1, SL, MVT::i32); in getHiHalf64()
1055 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One); in getHiHalf64()
1072 SDLoc SL(Op); in SplitVectorLoad() local
1082 std::tie(Lo, Hi) = DAG.SplitVector(Op, SL, LoVT, HiVT); in SplitVectorLoad()
1089 = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT, in SplitVectorLoad()
1095 SDValue HiPtr = DAG.getNode(ISD::ADD, SL, PtrVT, BasePtr, in SplitVectorLoad()
1096 DAG.getConstant(Size, SL, PtrVT)); in SplitVectorLoad()
1099 = DAG.getExtLoad(Load->getExtensionType(), SL, HiVT, in SplitVectorLoad()
1106 DAG.getNode(ISD::CONCAT_VECTORS, SL, VT, LoLoad, HiLoad), in SplitVectorLoad()
1107 DAG.getNode(ISD::TokenFactor, SL, MVT::Other, in SplitVectorLoad()
1111 return DAG.getMergeValues(Ops, SL); in SplitVectorLoad()
1188 SDLoc SL(Op); in SplitVectorStore() local
1196 std::tie(Lo, Hi) = DAG.SplitVector(Val, SL, LoVT, HiVT); in SplitVectorStore()
1199 SDValue HiPtr = DAG.getNode(ISD::ADD, SL, PtrVT, BasePtr, in SplitVectorStore()
1200 DAG.getConstant(LoMemVT.getStoreSize(), SL, in SplitVectorStore()
1209 = DAG.getTruncStore(Chain, SL, Lo, in SplitVectorStore()
1217 = DAG.getTruncStore(Chain, SL, Hi, in SplitVectorStore()
1225 return DAG.getNode(ISD::TokenFactor, SL, MVT::Other, LoStore, HiStore); in SplitVectorStore()
1589 SDLoc SL(Op); in LowerFREM() local
1596 SDValue Div = DAG.getNode(ISD::FDIV, SL, VT, X, Y); in LowerFREM()
1597 SDValue Floor = DAG.getNode(ISD::FTRUNC, SL, VT, Div); in LowerFREM()
1598 SDValue Mul = DAG.getNode(ISD::FMUL, SL, VT, Floor, Y); in LowerFREM()
1600 return DAG.getNode(ISD::FSUB, SL, VT, X, Mul); in LowerFREM()
1604 SDLoc SL(Op); in LowerFCEIL() local
1611 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFCEIL()
1613 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f64); in LowerFCEIL()
1614 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f64); in LowerFCEIL()
1619 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT); in LowerFCEIL()
1620 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); in LowerFCEIL()
1621 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc); in LowerFCEIL()
1623 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, One, Zero); in LowerFCEIL()
1625 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add); in LowerFCEIL()
1628 static SDValue extractF64Exponent(SDValue Hi, const SDLoc &SL, in extractF64Exponent() argument
1633 SDValue ExpPart = DAG.getNode(AMDGPUISD::BFE_U32, SL, MVT::i32, in extractF64Exponent()
1635 DAG.getConstant(FractBits - 32, SL, MVT::i32), in extractF64Exponent()
1636 DAG.getConstant(ExpBits, SL, MVT::i32)); in extractF64Exponent()
1637 SDValue Exp = DAG.getNode(ISD::SUB, SL, MVT::i32, ExpPart, in extractF64Exponent()
1638 DAG.getConstant(1023, SL, MVT::i32)); in extractF64Exponent()
1644 SDLoc SL(Op); in LowerFTRUNC() local
1649 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in LowerFTRUNC()
1650 const SDValue One = DAG.getConstant(1, SL, MVT::i32); in LowerFTRUNC()
1652 SDValue VecSrc = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); in LowerFTRUNC()
1656 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, VecSrc, One); in LowerFTRUNC()
1658 SDValue Exp = extractF64Exponent(Hi, SL, DAG); in LowerFTRUNC()
1663 const SDValue SignBitMask = DAG.getConstant(UINT32_C(1) << 31, SL, MVT::i32); in LowerFTRUNC()
1664 SDValue SignBit = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, SignBitMask); in LowerFTRUNC()
1667 SDValue SignBit64 = DAG.getBuildVector(MVT::v2i32, SL, {Zero, SignBit}); in LowerFTRUNC()
1668 SignBit64 = DAG.getNode(ISD::BITCAST, SL, MVT::i64, SignBit64); in LowerFTRUNC()
1670 SDValue BcInt = DAG.getNode(ISD::BITCAST, SL, MVT::i64, Src); in LowerFTRUNC()
1672 = DAG.getConstant((UINT64_C(1) << FractBits) - 1, SL, MVT::i64); in LowerFTRUNC()
1674 SDValue Shr = DAG.getNode(ISD::SRA, SL, MVT::i64, FractMask, Exp); in LowerFTRUNC()
1675 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64); in LowerFTRUNC()
1676 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, BcInt, Not); in LowerFTRUNC()
1681 const SDValue FiftyOne = DAG.getConstant(FractBits - 1, SL, MVT::i32); in LowerFTRUNC()
1683 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT); in LowerFTRUNC()
1684 SDValue ExpGt51 = DAG.getSetCC(SL, SetCCVT, Exp, FiftyOne, ISD::SETGT); in LowerFTRUNC()
1686 SDValue Tmp1 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpLt0, SignBit64, Tmp0); in LowerFTRUNC()
1687 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, ExpGt51, BcInt, Tmp1); in LowerFTRUNC()
1689 return DAG.getNode(ISD::BITCAST, SL, MVT::f64, Tmp2); in LowerFTRUNC()
1693 SDLoc SL(Op); in LowerFRINT() local
1699 SDValue C1 = DAG.getConstantFP(C1Val, SL, MVT::f64); in LowerFRINT()
1700 SDValue CopySign = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, C1, Src); in LowerFRINT()
1704 SDValue Tmp1 = DAG.getNode(ISD::FADD, SL, MVT::f64, Src, CopySign); in LowerFRINT()
1705 SDValue Tmp2 = DAG.getNode(ISD::FSUB, SL, MVT::f64, Tmp1, CopySign); in LowerFRINT()
1707 SDValue Fabs = DAG.getNode(ISD::FABS, SL, MVT::f64, Src); in LowerFRINT()
1710 SDValue C2 = DAG.getConstantFP(C2Val, SL, MVT::f64); in LowerFRINT()
1714 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT); in LowerFRINT()
1716 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2); in LowerFRINT()
1728 SDLoc SL(Op); in LowerFROUND32() local
1731 SDValue T = DAG.getNode(ISD::FTRUNC, SL, MVT::f32, X); in LowerFROUND32()
1735 SDValue Diff = DAG.getNode(ISD::FSUB, SL, MVT::f32, X, T); in LowerFROUND32()
1737 SDValue AbsDiff = DAG.getNode(ISD::FABS, SL, MVT::f32, Diff); in LowerFROUND32()
1739 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f32); in LowerFROUND32()
1740 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f32); in LowerFROUND32()
1741 const SDValue Half = DAG.getConstantFP(0.5, SL, MVT::f32); in LowerFROUND32()
1743 SDValue SignOne = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f32, One, X); in LowerFROUND32()
1748 SDValue Cmp = DAG.getSetCC(SL, SetCCVT, AbsDiff, Half, ISD::SETOGE); in LowerFROUND32()
1750 SDValue Sel = DAG.getNode(ISD::SELECT, SL, MVT::f32, Cmp, SignOne, Zero); in LowerFROUND32()
1752 return DAG.getNode(ISD::FADD, SL, MVT::f32, T, Sel); in LowerFROUND32()
1756 SDLoc SL(Op); in LowerFROUND64() local
1759 SDValue L = DAG.getNode(ISD::BITCAST, SL, MVT::i64, X); in LowerFROUND64()
1761 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in LowerFROUND64()
1762 const SDValue One = DAG.getConstant(1, SL, MVT::i32); in LowerFROUND64()
1763 const SDValue NegOne = DAG.getConstant(-1, SL, MVT::i32); in LowerFROUND64()
1764 const SDValue FiftyOne = DAG.getConstant(51, SL, MVT::i32); in LowerFROUND64()
1768 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X); in LowerFROUND64()
1770 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, One); in LowerFROUND64()
1772 SDValue Exp = extractF64Exponent(Hi, SL, DAG); in LowerFROUND64()
1774 const SDValue Mask = DAG.getConstant(INT64_C(0x000fffffffffffff), SL, in LowerFROUND64()
1777 SDValue M = DAG.getNode(ISD::SRA, SL, MVT::i64, Mask, Exp); in LowerFROUND64()
1778 SDValue D = DAG.getNode(ISD::SRA, SL, MVT::i64, in LowerFROUND64()
1779 DAG.getConstant(INT64_C(0x0008000000000000), SL, in LowerFROUND64()
1783 SDValue Tmp0 = DAG.getNode(ISD::AND, SL, MVT::i64, L, M); in LowerFROUND64()
1784 SDValue Tmp1 = DAG.getSetCC(SL, SetCCVT, in LowerFROUND64()
1785 DAG.getConstant(0, SL, MVT::i64), Tmp0, in LowerFROUND64()
1788 SDValue Tmp2 = DAG.getNode(ISD::SELECT, SL, MVT::i64, Tmp1, in LowerFROUND64()
1789 D, DAG.getConstant(0, SL, MVT::i64)); in LowerFROUND64()
1790 SDValue K = DAG.getNode(ISD::ADD, SL, MVT::i64, L, Tmp2); in LowerFROUND64()
1792 K = DAG.getNode(ISD::AND, SL, MVT::i64, K, DAG.getNOT(SL, M, MVT::i64)); in LowerFROUND64()
1793 K = DAG.getNode(ISD::BITCAST, SL, MVT::f64, K); in LowerFROUND64()
1795 SDValue ExpLt0 = DAG.getSetCC(SL, SetCCVT, Exp, Zero, ISD::SETLT); in LowerFROUND64()
1796 SDValue ExpGt51 = DAG.getSetCC(SL, SetCCVT, Exp, FiftyOne, ISD::SETGT); in LowerFROUND64()
1797 SDValue ExpEqNegOne = DAG.getSetCC(SL, SetCCVT, NegOne, Exp, ISD::SETEQ); in LowerFROUND64()
1799 SDValue Mag = DAG.getNode(ISD::SELECT, SL, MVT::f64, in LowerFROUND64()
1801 DAG.getConstantFP(1.0, SL, MVT::f64), in LowerFROUND64()
1802 DAG.getConstantFP(0.0, SL, MVT::f64)); in LowerFROUND64()
1804 SDValue S = DAG.getNode(ISD::FCOPYSIGN, SL, MVT::f64, Mag, X); in LowerFROUND64()
1806 K = DAG.getNode(ISD::SELECT, SL, MVT::f64, ExpLt0, S, K); in LowerFROUND64()
1807 K = DAG.getNode(ISD::SELECT, SL, MVT::f64, ExpGt51, X, K); in LowerFROUND64()
1825 SDLoc SL(Op); in LowerFFLOOR() local
1832 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFFLOOR()
1834 const SDValue Zero = DAG.getConstantFP(0.0, SL, MVT::f64); in LowerFFLOOR()
1835 const SDValue NegOne = DAG.getConstantFP(-1.0, SL, MVT::f64); in LowerFFLOOR()
1840 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOLT); in LowerFFLOOR()
1841 SDValue NeTrunc = DAG.getSetCC(SL, SetCCVT, Src, Trunc, ISD::SETONE); in LowerFFLOOR()
1842 SDValue And = DAG.getNode(ISD::AND, SL, SetCCVT, Lt0, NeTrunc); in LowerFFLOOR()
1844 SDValue Add = DAG.getNode(ISD::SELECT, SL, MVT::f64, And, NegOne, Zero); in LowerFFLOOR()
1846 return DAG.getNode(ISD::FADD, SL, MVT::f64, Trunc, Add); in LowerFFLOOR()
1850 SDLoc SL(Op); in LowerCTLZ() local
1855 return DAG.getNode(AMDGPUISD::FFBH_U32, SL, MVT::i32, Src); in LowerCTLZ()
1857 SDValue Vec = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); in LowerCTLZ()
1859 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in LowerCTLZ()
1860 const SDValue One = DAG.getConstant(1, SL, MVT::i32); in LowerCTLZ()
1862 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, Zero); in LowerCTLZ()
1863 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Vec, One); in LowerCTLZ()
1868 SDValue Hi0 = DAG.getSetCC(SL, SetCCVT, Hi, Zero, ISD::SETEQ); in LowerCTLZ()
1870 SDValue CtlzLo = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i32, Lo); in LowerCTLZ()
1871 SDValue CtlzHi = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i32, Hi); in LowerCTLZ()
1873 const SDValue Bits32 = DAG.getConstant(32, SL, MVT::i32); in LowerCTLZ()
1874 SDValue Add = DAG.getNode(ISD::ADD, SL, MVT::i32, CtlzLo, Bits32); in LowerCTLZ()
1877 SDValue NewCtlz = DAG.getNode(ISD::SELECT, SL, MVT::i32, Hi0, Add, CtlzHi); in LowerCTLZ()
1884 SDValue Lo0 = DAG.getSetCC(SL, SetCCVT, Lo, Zero, ISD::SETEQ); in LowerCTLZ()
1885 SDValue SrcIsZero = DAG.getNode(ISD::AND, SL, SetCCVT, Lo0, Hi0); in LowerCTLZ()
1892 const SDValue Bits32 = DAG.getConstant(64, SL, MVT::i32); in LowerCTLZ()
1896 NewCtlz = DAG.getNode(ISD::SELECT, SL, MVT::i32, in LowerCTLZ()
1900 return DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i64, NewCtlz); in LowerCTLZ()
1924 SDLoc SL(Op); in LowerINT_TO_FP32() local
1930 const SDValue SignBit = DAG.getConstant(63, SL, MVT::i64); in LowerINT_TO_FP32()
1931 S = DAG.getNode(ISD::SRA, SL, MVT::i64, L, SignBit); in LowerINT_TO_FP32()
1933 SDValue LPlusS = DAG.getNode(ISD::ADD, SL, MVT::i64, L, S); in LowerINT_TO_FP32()
1934 L = DAG.getNode(ISD::XOR, SL, MVT::i64, LPlusS, S); in LowerINT_TO_FP32()
1941 SDValue ZeroI32 = DAG.getConstant(0, SL, MVT::i32); in LowerINT_TO_FP32()
1942 SDValue ZeroI64 = DAG.getConstant(0, SL, MVT::i64); in LowerINT_TO_FP32()
1943 SDValue LZ = DAG.getNode(ISD::CTLZ_ZERO_UNDEF, SL, MVT::i64, L); in LowerINT_TO_FP32()
1944 LZ = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, LZ); in LowerINT_TO_FP32()
1946 SDValue K = DAG.getConstant(127U + 63U, SL, MVT::i32); in LowerINT_TO_FP32()
1947 SDValue E = DAG.getSelect(SL, MVT::i32, in LowerINT_TO_FP32()
1948 DAG.getSetCC(SL, SetCCVT, L, ZeroI64, ISD::SETNE), in LowerINT_TO_FP32()
1949 DAG.getNode(ISD::SUB, SL, MVT::i32, K, LZ), in LowerINT_TO_FP32()
1952 SDValue U = DAG.getNode(ISD::AND, SL, MVT::i64, in LowerINT_TO_FP32()
1953 DAG.getNode(ISD::SHL, SL, MVT::i64, L, LZ), in LowerINT_TO_FP32()
1954 DAG.getConstant((-1ULL) >> 1, SL, MVT::i64)); in LowerINT_TO_FP32()
1956 SDValue T = DAG.getNode(ISD::AND, SL, MVT::i64, U, in LowerINT_TO_FP32()
1957 DAG.getConstant(0xffffffffffULL, SL, MVT::i64)); in LowerINT_TO_FP32()
1959 SDValue UShl = DAG.getNode(ISD::SRL, SL, MVT::i64, in LowerINT_TO_FP32()
1960 U, DAG.getConstant(40, SL, MVT::i64)); in LowerINT_TO_FP32()
1962 SDValue V = DAG.getNode(ISD::OR, SL, MVT::i32, in LowerINT_TO_FP32()
1963 DAG.getNode(ISD::SHL, SL, MVT::i32, E, DAG.getConstant(23, SL, MVT::i32)), in LowerINT_TO_FP32()
1964 DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, UShl)); in LowerINT_TO_FP32()
1966 SDValue C = DAG.getConstant(0x8000000000ULL, SL, MVT::i64); in LowerINT_TO_FP32()
1967 SDValue RCmp = DAG.getSetCC(SL, SetCCVT, T, C, ISD::SETUGT); in LowerINT_TO_FP32()
1968 SDValue TCmp = DAG.getSetCC(SL, SetCCVT, T, C, ISD::SETEQ); in LowerINT_TO_FP32()
1970 SDValue One = DAG.getConstant(1, SL, MVT::i32); in LowerINT_TO_FP32()
1972 SDValue VTrunc1 = DAG.getNode(ISD::AND, SL, MVT::i32, V, One); in LowerINT_TO_FP32()
1974 SDValue R = DAG.getSelect(SL, MVT::i32, in LowerINT_TO_FP32()
1977 DAG.getSelect(SL, MVT::i32, TCmp, VTrunc1, ZeroI32)); in LowerINT_TO_FP32()
1978 R = DAG.getNode(ISD::ADD, SL, MVT::i32, V, R); in LowerINT_TO_FP32()
1979 R = DAG.getNode(ISD::BITCAST, SL, MVT::f32, R); in LowerINT_TO_FP32()
1984 SDValue RNeg = DAG.getNode(ISD::FNEG, SL, MVT::f32, R); in LowerINT_TO_FP32()
1985 return DAG.getSelect(SL, MVT::f32, DAG.getSExtOrTrunc(S, SL, SetCCVT), RNeg, R); in LowerINT_TO_FP32()
1990 SDLoc SL(Op); in LowerINT_TO_FP64() local
1993 SDValue BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Src); in LowerINT_TO_FP64()
1995 SDValue Lo = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, in LowerINT_TO_FP64()
1996 DAG.getConstant(0, SL, MVT::i32)); in LowerINT_TO_FP64()
1997 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, in LowerINT_TO_FP64()
1998 DAG.getConstant(1, SL, MVT::i32)); in LowerINT_TO_FP64()
2001 SL, MVT::f64, Hi); in LowerINT_TO_FP64()
2003 SDValue CvtLo = DAG.getNode(ISD::UINT_TO_FP, SL, MVT::f64, Lo); in LowerINT_TO_FP64()
2005 SDValue LdExp = DAG.getNode(AMDGPUISD::LDEXP, SL, MVT::f64, CvtHi, in LowerINT_TO_FP64()
2006 DAG.getConstant(32, SL, MVT::i32)); in LowerINT_TO_FP64()
2008 return DAG.getNode(ISD::FADD, SL, MVT::f64, LdExp, CvtLo); in LowerINT_TO_FP64()
2043 SDLoc SL(Op); in LowerFP64_TO_INT() local
2047 SDValue Trunc = DAG.getNode(ISD::FTRUNC, SL, MVT::f64, Src); in LowerFP64_TO_INT()
2049 SDValue K0 = DAG.getConstantFP(BitsToDouble(UINT64_C(0x3df0000000000000)), SL, in LowerFP64_TO_INT()
2051 SDValue K1 = DAG.getConstantFP(BitsToDouble(UINT64_C(0xc1f0000000000000)), SL, in LowerFP64_TO_INT()
2054 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, Trunc, K0); in LowerFP64_TO_INT()
2056 SDValue FloorMul = DAG.getNode(ISD::FFLOOR, SL, MVT::f64, Mul); in LowerFP64_TO_INT()
2059 SDValue Fma = DAG.getNode(ISD::FMA, SL, MVT::f64, FloorMul, K1, Trunc); in LowerFP64_TO_INT()
2061 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL, in LowerFP64_TO_INT()
2063 SDValue Lo = DAG.getNode(ISD::FP_TO_UINT, SL, MVT::i32, Fma); in LowerFP64_TO_INT()
2065 SDValue Result = DAG.getBuildVector(MVT::v2i32, SL, {Lo, Hi}); in LowerFP64_TO_INT()
2067 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Result); in LowerFP64_TO_INT()
2202 SDLoc SL(N); in performLoadCombine() local
2231 = DAG.getLoad(NewVT, SL, LN->getChain(), in performLoadCombine()
2234 SDValue BC = DAG.getNode(ISD::BITCAST, SL, VT, NewLoad); in performLoadCombine()
2253 SDLoc SL(N); in performStoreCombine() local
2280 SDValue CastVal = DAG.getNode(ISD::BITCAST, SL, NewVT, Val); in performStoreCombine()
2282 SDValue CastBack = DAG.getNode(ISD::BITCAST, SL, VT, CastVal); in performStoreCombine()
2286 return DAG.getStore(SN->getChain(), SL, CastVal, in performStoreCombine()
2311 SDLoc SL(N); in performAndCombine() local
2317 SDValue LoRHS = DAG.getConstant(Lo_32(Val), SL, MVT::i32); in performAndCombine()
2318 SDValue HiRHS = DAG.getConstant(Hi_32(Val), SL, MVT::i32); in performAndCombine()
2320 SDValue LoAnd = DAG.getNode(ISD::AND, SL, MVT::i32, Lo, LoRHS); in performAndCombine()
2321 SDValue HiAnd = DAG.getNode(ISD::AND, SL, MVT::i32, Hi, HiRHS); in performAndCombine()
2328 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {LoAnd, HiAnd}); in performAndCombine()
2329 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec); in performAndCombine()
2352 SDLoc SL(N); in performShlCombine() local
2355 SDValue ShiftAmt = DAG.getConstant(RHSVal - 32, SL, MVT::i32); in performShlCombine()
2357 SDValue Lo = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, LHS); in performShlCombine()
2358 SDValue NewShift = DAG.getNode(ISD::SHL, SL, MVT::i32, Lo, ShiftAmt); in performShlCombine()
2360 const SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in performShlCombine()
2362 SDValue Vec = DAG.getBuildVector(MVT::v2i32, SL, {Zero, NewShift}); in performShlCombine()
2363 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec); in performShlCombine()
2376 SDLoc SL(N); in performSraCombine() local
2382 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, in performSraCombine()
2383 DAG.getConstant(31, SL, MVT::i32)); in performSraCombine()
2385 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {Hi, NewShift}); in performSraCombine()
2386 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec); in performSraCombine()
2392 SDValue NewShift = DAG.getNode(ISD::SRA, SL, MVT::i32, Hi, in performSraCombine()
2393 DAG.getConstant(31, SL, MVT::i32)); in performSraCombine()
2394 SDValue BuildVec = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, NewShift}); in performSraCombine()
2395 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildVec); in performSraCombine()
2419 SDLoc SL(N); in performSrlCombine() local
2421 SDValue One = DAG.getConstant(1, SL, MVT::i32); in performSrlCombine()
2422 SDValue Zero = DAG.getConstant(0, SL, MVT::i32); in performSrlCombine()
2424 SDValue VecOp = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, N->getOperand(0)); in performSrlCombine()
2425 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, in performSrlCombine()
2428 SDValue NewConst = DAG.getConstant(ShiftAmt - 32, SL, MVT::i32); in performSrlCombine()
2429 SDValue NewShift = DAG.getNode(ISD::SRL, SL, MVT::i32, Hi, NewConst); in performSrlCombine()
2431 SDValue BuildPair = DAG.getBuildVector(MVT::v2i32, SL, {NewShift, Zero}); in performSrlCombine()
2433 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, BuildPair); in performSrlCombine()
2482 const SDLoc &SL, SDValue Op) { in getFFBH_U32() argument
2489 Op = DAG.getNode(ISD::ZERO_EXTEND, SL, MVT::i32, Op); in getFFBH_U32()
2491 SDValue FFBH = DAG.getNode(AMDGPUISD::FFBH_U32, SL, MVT::i32, Op); in getFFBH_U32()
2493 FFBH = DAG.getNode(ISD::TRUNCATE, SL, VT, FFBH); in getFFBH_U32()
2505 SDValue AMDGPUTargetLowering::performCtlzCombine(const SDLoc &SL, SDValue Cond, in performCtlzCombine() argument
2521 return getFFBH_U32(*this, DAG, SL, CmpLHS); in performCtlzCombine()
2529 return getFFBH_U32(*this, DAG, SL, CmpLHS); in performCtlzCombine()
2581 SDLoc SL(N); in PerformDAGCombine() local
2583 return DAG.getNode(ISD::BUILD_VECTOR, SL, DestVT, in PerformDAGCombine()
2584 DAG.getConstant(Lo_32(CVal), SL, MVT::i32), in PerformDAGCombine()
2585 DAG.getConstant(Hi_32(CVal), SL, MVT::i32)); in PerformDAGCombine()
2590 SDLoc SL(N); in PerformDAGCombine() local
2592 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32, in PerformDAGCombine()
2593 DAG.getConstant(Lo_32(CVal), SL, MVT::i32), in PerformDAGCombine()
2594 DAG.getConstant(Hi_32(CVal), SL, MVT::i32)); in PerformDAGCombine()
2596 return DAG.getNode(ISD::BITCAST, SL, DestVT, Vec); in PerformDAGCombine()