Lines Matching refs:R600TargetLowering

33 R600TargetLowering::R600TargetLowering(const TargetMachine &TM,  in R600TargetLowering()  function in R600TargetLowering
202 const R600Subtarget *R600TargetLowering::getSubtarget() const { in getSubtarget()
211 R600TargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI, in EmitInstrWithCustomInserter()
612 SDValue R600TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const { in LowerOperation()
828 void R600TargetLowering::ReplaceNodeResults(SDNode *N, in ReplaceNodeResults()
864 SDValue R600TargetLowering::vectorToVerticalVector(SelectionDAG &DAG, in vectorToVerticalVector()
882 SDValue R600TargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op, in LowerEXTRACT_VECTOR_ELT()
898 SDValue R600TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op, in LowerINSERT_VECTOR_ELT()
915 SDValue R600TargetLowering::LowerGlobalAddress(AMDGPUMachineFunction *MFI, in LowerGlobalAddress()
931 SDValue R600TargetLowering::LowerTrig(SDValue Op, SelectionDAG &DAG) const { in LowerTrig()
965 SDValue R600TargetLowering::LowerSHLParts(SDValue Op, SelectionDAG &DAG) const { in LowerSHLParts()
1001 SDValue R600TargetLowering::LowerSRXParts(SDValue Op, SelectionDAG &DAG) const { in LowerSRXParts()
1039 SDValue R600TargetLowering::LowerUADDSUBO(SDValue Op, SelectionDAG &DAG, in LowerUADDSUBO()
1057 SDValue R600TargetLowering::LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const { in LowerFPTOUINT()
1068 SDValue R600TargetLowering::LowerImplicitParameter(SelectionDAG &DAG, EVT VT, in LowerImplicitParameter()
1084 bool R600TargetLowering::isZero(SDValue Op) const { in isZero()
1094 bool R600TargetLowering::isHWTrueValue(SDValue Op) const { in isHWTrueValue()
1101 bool R600TargetLowering::isHWFalseValue(SDValue Op) const { in isHWFalseValue()
1108 SDValue R600TargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const { in LowerSELECT_CC()
1255 SDValue R600TargetLowering::stackPtrToRegIndex(SDValue Ptr, in stackPtrToRegIndex()
1277 void R600TargetLowering::getStackAddress(unsigned StackWidth, in getStackAddress()
1306 SDValue R600TargetLowering::lowerPrivateTruncStore(StoreSDNode *Store, in lowerPrivateTruncStore()
1354 SDValue R600TargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const { in LowerSTORE()
1509 SDValue R600TargetLowering::lowerPrivateExtLoad(SDValue Op, in lowerPrivateExtLoad()
1565 SDValue R600TargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const { in LowerLOAD()
1709 SDValue R600TargetLowering::LowerBRCOND(SDValue Op, SelectionDAG &DAG) const { in LowerBRCOND()
1718 SDValue R600TargetLowering::lowerFrameIndex(SDValue Op, in lowerFrameIndex()
1736 SDValue R600TargetLowering::LowerFormalArguments( in LowerFormalArguments()
1810 EVT R600TargetLowering::getSetCCResultType(const DataLayout &DL, LLVMContext &, in getSetCCResultType()
1817 bool R600TargetLowering::allowsMisalignedMemoryAccesses(EVT VT, in allowsMisalignedMemoryAccesses()
1918 SDValue R600TargetLowering::OptimizeSwizzle(SDValue BuildVector, SDValue Swz[4], in OptimizeSwizzle()
1948 SDValue R600TargetLowering::PerformDAGCombine(SDNode *N, in PerformDAGCombine()
2169 bool R600TargetLowering::FoldOperand(SDNode *ParentNode, unsigned SrcIdx, in FoldOperand()
2302 SDNode *R600TargetLowering::PostISelFolding(MachineSDNode *Node, in PostISelFolding()