Lines Matching refs:OpName
71 NewMI->getOperand(getOperandIdx(*NewMI, AMDGPU::OpName::src0)) in copyPhysReg()
148 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) == -1; in isLDSNoRetInstr()
152 return isLDSInstr(Opcode) && getOperandIdx(Opcode, AMDGPU::OpName::dst) != -1; in isLDSRetInstr()
253 AMDGPU::OpName::src0, in getSrcIdx()
254 AMDGPU::OpName::src1, in getSrcIdx()
255 AMDGPU::OpName::src2 in getSrcIdx()
264 {AMDGPU::OpName::src0, AMDGPU::OpName::src0_sel}, in getSelIdx()
265 {AMDGPU::OpName::src1, AMDGPU::OpName::src1_sel}, in getSelIdx()
266 {AMDGPU::OpName::src2, AMDGPU::OpName::src2_sel}, in getSelIdx()
267 {AMDGPU::OpName::src0_X, AMDGPU::OpName::src0_sel_X}, in getSelIdx()
268 {AMDGPU::OpName::src0_Y, AMDGPU::OpName::src0_sel_Y}, in getSelIdx()
269 {AMDGPU::OpName::src0_Z, AMDGPU::OpName::src0_sel_Z}, in getSelIdx()
270 {AMDGPU::OpName::src0_W, AMDGPU::OpName::src0_sel_W}, in getSelIdx()
271 {AMDGPU::OpName::src1_X, AMDGPU::OpName::src1_sel_X}, in getSelIdx()
272 {AMDGPU::OpName::src1_Y, AMDGPU::OpName::src1_sel_Y}, in getSelIdx()
273 {AMDGPU::OpName::src1_Z, AMDGPU::OpName::src1_sel_Z}, in getSelIdx()
274 {AMDGPU::OpName::src1_W, AMDGPU::OpName::src1_sel_W} in getSelIdx()
291 {AMDGPU::OpName::src0_X, AMDGPU::OpName::src0_sel_X}, in getSrcs()
292 {AMDGPU::OpName::src0_Y, AMDGPU::OpName::src0_sel_Y}, in getSrcs()
293 {AMDGPU::OpName::src0_Z, AMDGPU::OpName::src0_sel_Z}, in getSrcs()
294 {AMDGPU::OpName::src0_W, AMDGPU::OpName::src0_sel_W}, in getSrcs()
295 {AMDGPU::OpName::src1_X, AMDGPU::OpName::src1_sel_X}, in getSrcs()
296 {AMDGPU::OpName::src1_Y, AMDGPU::OpName::src1_sel_Y}, in getSrcs()
297 {AMDGPU::OpName::src1_Z, AMDGPU::OpName::src1_sel_Z}, in getSrcs()
298 {AMDGPU::OpName::src1_W, AMDGPU::OpName::src1_sel_W}, in getSrcs()
317 {AMDGPU::OpName::src0, AMDGPU::OpName::src0_sel}, in getSrcs()
318 {AMDGPU::OpName::src1, AMDGPU::OpName::src1_sel}, in getSrcs()
319 {AMDGPU::OpName::src2, AMDGPU::OpName::src2_sel}, in getSrcs()
336 MI.getOperand(getOperandIdx(MI.getOpcode(), AMDGPU::OpName::literal)); in getSrcs()
558 AMDGPU::OpName::bank_swizzle); in fitsReadPortLimitations()
1000 MI.getOperand(getOperandIdx(MI, AMDGPU::OpName::pred_sel_X)) in PredicateInstruction()
1002 MI.getOperand(getOperandIdx(MI, AMDGPU::OpName::pred_sel_Y)) in PredicateInstruction()
1004 MI.getOperand(getOperandIdx(MI, AMDGPU::OpName::pred_sel_Z)) in PredicateInstruction()
1006 MI.getOperand(getOperandIdx(MI, AMDGPU::OpName::pred_sel_W)) in PredicateInstruction()
1047 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::addr); in expandPostRAPseudo()
1052 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::chan); in expandPostRAPseudo()
1055 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::dst); in expandPostRAPseudo()
1069 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::val); in expandPostRAPseudo()
1155 setImmOperand(*MOVA, AMDGPU::OpName::write, 0); in buildIndirectWrite()
1161 setImmOperand(*Mov, AMDGPU::OpName::dst_rel, 1); in buildIndirectWrite()
1188 setImmOperand(*MOVA, AMDGPU::OpName::write, 0); in buildIndirectRead()
1194 setImmOperand(*Mov, AMDGPU::OpName::src0_rel, 1); in buildIndirectRead()
1315 OPERAND_CASE(AMDGPU::OpName::update_exec_mask) in getSlotedOps()
1316 OPERAND_CASE(AMDGPU::OpName::update_pred) in getSlotedOps()
1317 OPERAND_CASE(AMDGPU::OpName::write) in getSlotedOps()
1318 OPERAND_CASE(AMDGPU::OpName::omod) in getSlotedOps()
1319 OPERAND_CASE(AMDGPU::OpName::dst_rel) in getSlotedOps()
1320 OPERAND_CASE(AMDGPU::OpName::clamp) in getSlotedOps()
1321 OPERAND_CASE(AMDGPU::OpName::src0) in getSlotedOps()
1322 OPERAND_CASE(AMDGPU::OpName::src0_neg) in getSlotedOps()
1323 OPERAND_CASE(AMDGPU::OpName::src0_rel) in getSlotedOps()
1324 OPERAND_CASE(AMDGPU::OpName::src0_abs) in getSlotedOps()
1325 OPERAND_CASE(AMDGPU::OpName::src0_sel) in getSlotedOps()
1326 OPERAND_CASE(AMDGPU::OpName::src1) in getSlotedOps()
1327 OPERAND_CASE(AMDGPU::OpName::src1_neg) in getSlotedOps()
1328 OPERAND_CASE(AMDGPU::OpName::src1_rel) in getSlotedOps()
1329 OPERAND_CASE(AMDGPU::OpName::src1_abs) in getSlotedOps()
1330 OPERAND_CASE(AMDGPU::OpName::src1_sel) in getSlotedOps()
1331 OPERAND_CASE(AMDGPU::OpName::pred_sel) in getSlotedOps()
1350 getOperandIdx(MI->getOpcode(), getSlotedOps(AMDGPU::OpName::src0, Slot))); in buildSlotOfVectorInstruction()
1352 getOperandIdx(MI->getOpcode(), getSlotedOps(AMDGPU::OpName::src1, Slot))); in buildSlotOfVectorInstruction()
1356 AMDGPU::OpName::update_exec_mask, in buildSlotOfVectorInstruction()
1357 AMDGPU::OpName::update_pred, in buildSlotOfVectorInstruction()
1358 AMDGPU::OpName::write, in buildSlotOfVectorInstruction()
1359 AMDGPU::OpName::omod, in buildSlotOfVectorInstruction()
1360 AMDGPU::OpName::dst_rel, in buildSlotOfVectorInstruction()
1361 AMDGPU::OpName::clamp, in buildSlotOfVectorInstruction()
1362 AMDGPU::OpName::src0_neg, in buildSlotOfVectorInstruction()
1363 AMDGPU::OpName::src0_rel, in buildSlotOfVectorInstruction()
1364 AMDGPU::OpName::src0_abs, in buildSlotOfVectorInstruction()
1365 AMDGPU::OpName::src0_sel, in buildSlotOfVectorInstruction()
1366 AMDGPU::OpName::src1_neg, in buildSlotOfVectorInstruction()
1367 AMDGPU::OpName::src1_rel, in buildSlotOfVectorInstruction()
1368 AMDGPU::OpName::src1_abs, in buildSlotOfVectorInstruction()
1369 AMDGPU::OpName::src1_sel, in buildSlotOfVectorInstruction()
1373 getSlotedOps(AMDGPU::OpName::pred_sel, Slot))); in buildSlotOfVectorInstruction()
1374 MIB->getOperand(getOperandIdx(Opcode, AMDGPU::OpName::pred_sel)) in buildSlotOfVectorInstruction()
1393 setImmOperand(*MovImm, AMDGPU::OpName::literal, Imm); in buildMovImm()
1439 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::clamp); in getFlagOp()
1442 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::write); in getFlagOp()
1446 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::last); in getFlagOp()
1451 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::src0_neg); in getFlagOp()
1454 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::src1_neg); in getFlagOp()
1457 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::src2_neg); in getFlagOp()
1468 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::src0_abs); in getFlagOp()
1471 FlagIndex = getOperandIdx(MI, AMDGPU::OpName::src1_abs); in getFlagOp()