31   return makeArrayRef(AMDGPU::SGPR_128RegClass.begin(),  in getAllSGPR128()
32                       AMDGPU::SGPR_128RegClass.getNumRegs());  in getAllSGPR128()
36   return makeArrayRef(AMDGPU::SGPR_32RegClass.begin(),  in getAllSGPRs()
37                       AMDGPU::SGPR_32RegClass.getNumRegs());  in getAllSGPRs()
70   assert(ScratchRsrcReg != AMDGPU::NoRegister);  in emitPrologue()
73   assert(ScratchWaveOffsetReg != AMDGPU::NoRegister);  in emitPrologue()
78   unsigned PreloadedPrivateBufferReg = AMDGPU::NoRegister;  in emitPrologue()
106     unsigned FlatScrInitHi = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub1);  in emitPrologue()
107     BuildMI(MBB, I, DL, TII->get(AMDGPU::S_MOV_B32), AMDGPU::FLAT_SCR_LO)  in emitPrologue()
110     unsigned FlatScrInitLo = TRI->getSubReg(FlatScratchInitReg, AMDGPU::sub0);  in emitPrologue()
114     BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ADD_U32), FlatScrInitLo)  in emitPrologue()
119     BuildMI(MBB, I, DL, TII->get(AMDGPU::S_LSHR_B32), AMDGPU::FLAT_SCR_HI)  in emitPrologue()
211   const MCInstrDesc &SMovB32 = TII->get(AMDGPU::S_MOV_B32);  in emitPrologue()
227     unsigned Rsrc01 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0_sub1);  in emitPrologue()
228     unsigned Rsrc23 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2_sub3);  in emitPrologue()
230     unsigned Lo = TRI->getSubReg(PreloadedPrivateBufferReg, AMDGPU::sub0_sub1);  in emitPrologue()
231     unsigned Hi = TRI->getSubReg(PreloadedPrivateBufferReg, AMDGPU::sub2_sub3);  in emitPrologue()
233     const MCInstrDesc &SMovB64 = TII->get(AMDGPU::S_MOV_B64);  in emitPrologue()
240     unsigned Rsrc0 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub0);  in emitPrologue()
241     unsigned Rsrc1 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub1);  in emitPrologue()
242     unsigned Rsrc2 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub2);  in emitPrologue()
243     unsigned Rsrc3 = TRI->getSubReg(ScratchRsrcReg, AMDGPU::sub3);  in emitPrologue()
294       AMDGPU::SGPR_32RegClass.getSize(),  in processFunctionBeforeFrameFinalized()
295       AMDGPU::SGPR_32RegClass.getAlignment());  in processFunctionBeforeFrameFinalized()
320       MF.getRegInfo().createVirtualRegister(&AMDGPU::VGPR_32RegClass);  in emitDebuggerPrologue()
321     BuildMI(MBB, I, DL, TII->get(AMDGPU::V_MOV_B32_e32), WorkGroupIDVGPR)  in emitDebuggerPrologue()
327       WorkGroupIDObjectIdx, &AMDGPU::VGPR_32RegClass, TRI);  in emitDebuggerPrologue()
337       WorkItemIDObjectIdx, &AMDGPU::VGPR_32RegClass, TRI);  in emitDebuggerPrologue()