Lines Matching refs:SL
549 const SDLoc &SL, SDValue Chain, in LowerParameterPtr() argument
558 SDValue BasePtr = DAG.getCopyFromReg(Chain, SL, in LowerParameterPtr()
560 return DAG.getNode(ISD::ADD, SL, PtrVT, BasePtr, in LowerParameterPtr()
561 DAG.getConstant(Offset, SL, PtrVT)); in LowerParameterPtr()
564 const SDLoc &SL, SDValue Chain, in LowerParameter() argument
579 SDValue Ptr = LowerParameterPtr(DAG, SL, Chain, Offset); in LowerParameter()
581 VT, SL, Chain, Ptr, PtrOffset, PtrInfo, MemVT, in LowerParameter()
1280 SDLoc SL(Op); in LowerFrameIndex() local
1311 return DAG.getNode(ISD::AssertZext, SL, MVT::i32, TFI, in LowerFrameIndex()
1443 SDLoc SL; in getSegmentAperture() local
1456 SDValue Ptr = DAG.getNode(ISD::ADD, SL, MVT::i64, QueuePtr, in getSegmentAperture()
1457 DAG.getConstant(StructOffset, SL, MVT::i64)); in getSegmentAperture()
1466 return DAG.getLoad(MVT::i32, SL, QueuePtr.getValue(1), Ptr, in getSegmentAperture()
1474 SDLoc SL(Op); in lowerADDRSPACECAST() local
1480 SDValue SegmentNullPtr = DAG.getConstant(-1, SL, MVT::i32); in lowerADDRSPACECAST()
1481 SDValue FlatNullPtr = DAG.getConstant(0, SL, MVT::i64); in lowerADDRSPACECAST()
1487 SDValue NonNull = DAG.getSetCC(SL, MVT::i1, Src, FlatNullPtr, ISD::SETNE); in lowerADDRSPACECAST()
1488 SDValue Ptr = DAG.getNode(ISD::TRUNCATE, SL, MVT::i32, Src); in lowerADDRSPACECAST()
1490 return DAG.getNode(ISD::SELECT, SL, MVT::i32, in lowerADDRSPACECAST()
1500 = DAG.getSetCC(SL, MVT::i1, Src, SegmentNullPtr, ISD::SETNE); in lowerADDRSPACECAST()
1504 = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32, Src, Aperture); in lowerADDRSPACECAST()
1506 return DAG.getNode(ISD::SELECT, SL, MVT::i64, NonNull, in lowerADDRSPACECAST()
1507 DAG.getNode(ISD::BITCAST, SL, MVT::i64, CvtPtr), in lowerADDRSPACECAST()
1516 *MF.getFunction(), "invalid addrspacecast", SL.getDebugLoc()); in lowerADDRSPACECAST()
1627 SDLoc SL(Op); in lowerImplicitZextParam() local
1628 SDValue Param = LowerParameter(DAG, MVT::i32, MVT::i32, SL, in lowerImplicitZextParam()
1631 return DAG.getNode(ISD::AssertZext, SL, MVT::i32, Param, in lowerImplicitZextParam()
2117 SDLoc SL(Op); in LowerFastFDIV() local
2136 return DAG.getNode(AMDGPUISD::RSQ, SL, VT, RHS.getOperand(0)); in LowerFastFDIV()
2139 return DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS); in LowerFastFDIV()
2150 SDValue Recip = DAG.getNode(AMDGPUISD::RCP, SL, VT, RHS); in LowerFastFDIV()
2151 return DAG.getNode(ISD::FMUL, SL, VT, LHS, Recip, &Flags); in LowerFastFDIV()
2161 SDLoc SL(Op); in LowerFDIV32() local
2168 SDValue r1 = DAG.getNode(ISD::FABS, SL, MVT::f32, RHS); in LowerFDIV32()
2171 const SDValue K0 = DAG.getConstantFP(K0Val, SL, MVT::f32); in LowerFDIV32()
2174 const SDValue K1 = DAG.getConstantFP(K1Val, SL, MVT::f32); in LowerFDIV32()
2176 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f32); in LowerFDIV32()
2181 SDValue r2 = DAG.getSetCC(SL, SetCCVT, r1, K0, ISD::SETOGT); in LowerFDIV32()
2183 SDValue r3 = DAG.getNode(ISD::SELECT, SL, MVT::f32, r2, K1, One); in LowerFDIV32()
2187 r1 = DAG.getNode(ISD::FMUL, SL, MVT::f32, RHS, r3); in LowerFDIV32()
2190 SDValue r0 = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, r1); in LowerFDIV32()
2192 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f32, LHS, r0); in LowerFDIV32()
2194 return DAG.getNode(ISD::FMUL, SL, MVT::f32, r3, Mul); in LowerFDIV32()
2198 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f32); in LowerFDIV32()
2202 SDValue DenominatorScaled = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, RHS, RHS, LHS); in LowerFDIV32()
2203 SDValue NumeratorScaled = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, LHS, RHS, LHS); in LowerFDIV32()
2206 SDValue ApproxRcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f32, DenominatorScaled); in LowerFDIV32()
2208 SDValue NegDivScale0 = DAG.getNode(ISD::FNEG, SL, MVT::f32, DenominatorScaled); in LowerFDIV32()
2210 SDValue Fma0 = DAG.getNode(ISD::FMA, SL, MVT::f32, NegDivScale0, ApproxRcp, One); in LowerFDIV32()
2211 SDValue Fma1 = DAG.getNode(ISD::FMA, SL, MVT::f32, Fma0, ApproxRcp, ApproxRcp); in LowerFDIV32()
2213 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f32, NumeratorScaled, Fma1); in LowerFDIV32()
2215 SDValue Fma2 = DAG.getNode(ISD::FMA, SL, MVT::f32, NegDivScale0, Mul, NumeratorScaled); in LowerFDIV32()
2216 SDValue Fma3 = DAG.getNode(ISD::FMA, SL, MVT::f32, Fma2, Fma1, Mul); in LowerFDIV32()
2217 SDValue Fma4 = DAG.getNode(ISD::FMA, SL, MVT::f32, NegDivScale0, Fma3, NumeratorScaled); in LowerFDIV32()
2220 SDValue Fmas = DAG.getNode(AMDGPUISD::DIV_FMAS, SL, MVT::f32, Fma4, Fma1, Fma3, Scale); in LowerFDIV32()
2222 return DAG.getNode(AMDGPUISD::DIV_FIXUP, SL, MVT::f32, Fmas, RHS, LHS); in LowerFDIV32()
2229 SDLoc SL(Op); in LowerFDIV64() local
2233 const SDValue One = DAG.getConstantFP(1.0, SL, MVT::f64); in LowerFDIV64()
2237 SDValue DivScale0 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, Y, Y, X); in LowerFDIV64()
2239 SDValue NegDivScale0 = DAG.getNode(ISD::FNEG, SL, MVT::f64, DivScale0); in LowerFDIV64()
2241 SDValue Rcp = DAG.getNode(AMDGPUISD::RCP, SL, MVT::f64, DivScale0); in LowerFDIV64()
2243 SDValue Fma0 = DAG.getNode(ISD::FMA, SL, MVT::f64, NegDivScale0, Rcp, One); in LowerFDIV64()
2245 SDValue Fma1 = DAG.getNode(ISD::FMA, SL, MVT::f64, Rcp, Fma0, Rcp); in LowerFDIV64()
2247 SDValue Fma2 = DAG.getNode(ISD::FMA, SL, MVT::f64, NegDivScale0, Fma1, One); in LowerFDIV64()
2249 SDValue DivScale1 = DAG.getNode(AMDGPUISD::DIV_SCALE, SL, ScaleVT, X, Y, X); in LowerFDIV64()
2251 SDValue Fma3 = DAG.getNode(ISD::FMA, SL, MVT::f64, Fma1, Fma2, Fma1); in LowerFDIV64()
2252 SDValue Mul = DAG.getNode(ISD::FMUL, SL, MVT::f64, DivScale1, Fma3); in LowerFDIV64()
2254 SDValue Fma4 = DAG.getNode(ISD::FMA, SL, MVT::f64, in LowerFDIV64()
2263 const SDValue Hi = DAG.getConstant(1, SL, MVT::i32); in LowerFDIV64()
2266 SDValue NumBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, X); in LowerFDIV64()
2267 SDValue DenBC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, Y); in LowerFDIV64()
2268 SDValue Scale0BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale0); in LowerFDIV64()
2269 SDValue Scale1BC = DAG.getNode(ISD::BITCAST, SL, MVT::v2i32, DivScale1); in LowerFDIV64()
2271 SDValue NumHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, NumBC, Hi); in LowerFDIV64()
2272 SDValue DenHi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, DenBC, Hi); in LowerFDIV64()
2275 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Scale0BC, Hi); in LowerFDIV64()
2277 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, Scale1BC, Hi); in LowerFDIV64()
2279 SDValue CmpDen = DAG.getSetCC(SL, MVT::i1, DenHi, Scale0Hi, ISD::SETEQ); in LowerFDIV64()
2280 SDValue CmpNum = DAG.getSetCC(SL, MVT::i1, NumHi, Scale1Hi, ISD::SETEQ); in LowerFDIV64()
2281 Scale = DAG.getNode(ISD::XOR, SL, MVT::i1, CmpNum, CmpDen); in LowerFDIV64()
2286 SDValue Fmas = DAG.getNode(AMDGPUISD::DIV_FMAS, SL, MVT::f64, in LowerFDIV64()
2289 return DAG.getNode(AMDGPUISD::DIV_FIXUP, SL, MVT::f64, Fmas, Y, X); in LowerFDIV64()
2508 SDLoc SL(N); in performSHLPtrCombine() local
2511 SDValue ShlX = DAG.getNode(ISD::SHL, SL, VT, N0.getOperand(0), N1); in performSHLPtrCombine()
2512 SDValue COffset = DAG.getConstant(Offset, SL, MVT::i32); in performSHLPtrCombine()
2514 return DAG.getNode(ISD::ADD, SL, VT, ShlX, COffset); in performSHLPtrCombine()
2595 SDLoc SL(N); in performOrCombine() local
2598 SDValue LowOr = DAG.getNode(ISD::OR, SL, MVT::i32, LowLHS, ExtSrc); in performOrCombine()
2603 SDValue Vec = DAG.getNode(ISD::BUILD_VECTOR, SL, MVT::v2i32, in performOrCombine()
2605 return DAG.getNode(ISD::BITCAST, SL, MVT::i64, Vec); in performOrCombine()
2710 static SDValue performIntMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL, in performIntMed3ImmCombine() argument
2729 return DAG.getNode(Signed ? AMDGPUISD::SMED3 : AMDGPUISD::UMED3, SL, VT, in performIntMed3ImmCombine()
2740 static SDValue performFPMed3ImmCombine(SelectionDAG &DAG, const SDLoc &SL, in performFPMed3ImmCombine() argument
2762 return DAG.getNode(AMDGPUISD::FMED3, SL, K0->getValueType(0), in performFPMed3ImmCombine()
2830 SDLoc SL(N); in performSetCCCombine() local
2850 return DAG.getNode(AMDGPUISD::FP_CLASS, SL, MVT::i1, LHS.getOperand(0), in performSetCCCombine()
2851 DAG.getConstant(Mask, SL, MVT::i32)); in performSetCCCombine()