86 ARMBaseInstrInfo::ARMBaseInstrInfo(const ARMSubtarget& STI)  in ARMBaseInstrInfo()  function in ARMBaseInstrInfo
100 ARMBaseInstrInfo::CreateTargetHazardRecognizer(const TargetSubtargetInfo *STI,  in CreateTargetHazardRecognizer()
110 ScheduleHazardRecognizer *ARMBaseInstrInfo::
118 MachineInstr *ARMBaseInstrInfo::convertToThreeAddress(  in convertToThreeAddress()
293 bool ARMBaseInstrInfo::analyzeBranch(MachineBasicBlock &MBB,  in analyzeBranch()
385 unsigned ARMBaseInstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {  in RemoveBranch()
409 unsigned ARMBaseInstrInfo::InsertBranch(MachineBasicBlock &MBB,  in InsertBranch()
450 bool ARMBaseInstrInfo::
457 bool ARMBaseInstrInfo::isPredicated(const MachineInstr &MI) const {  in isPredicated()
473 bool ARMBaseInstrInfo::PredicateInstruction(  in PredicateInstruction()
494 bool ARMBaseInstrInfo::SubsumesPredicate(ArrayRef<MachineOperand> Pred1,  in SubsumesPredicate()
520 bool ARMBaseInstrInfo::DefinesPredicate(  in DefinesPredicate()
574 bool ARMBaseInstrInfo::isPredicable(MachineInstr &MI) const {  in isPredicable()
613 unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr &MI) const {  in GetInstSizeInBytes()
666 unsigned ARMBaseInstrInfo::getInstBundleLength(const MachineInstr &MI) const {  in getInstBundleLength()
677 void ARMBaseInstrInfo::copyFromCPSR(MachineBasicBlock &MBB,  in copyFromCPSR()
698 void ARMBaseInstrInfo::copyToCPSR(MachineBasicBlock &MBB,  in copyToCPSR()
720 void ARMBaseInstrInfo::copyPhysReg(MachineBasicBlock &MBB,  in copyPhysReg()
852 ARMBaseInstrInfo::AddDReg(MachineInstrBuilder &MIB, unsigned Reg,  in AddDReg()
863 void ARMBaseInstrInfo::
997 unsigned ARMBaseInstrInfo::isStoreToStackSlot(const MachineInstr &MI,  in isStoreToStackSlot()
1040 unsigned ARMBaseInstrInfo::isStoreToStackSlotPostFE(const MachineInstr &MI,  in isStoreToStackSlotPostFE()
1046 void ARMBaseInstrInfo::
1179 unsigned ARMBaseInstrInfo::isLoadFromStackSlot(const MachineInstr &MI,  in isLoadFromStackSlot()
1222 unsigned ARMBaseInstrInfo::isLoadFromStackSlotPostFE(const MachineInstr &MI,  in isLoadFromStackSlotPostFE()
1230 void ARMBaseInstrInfo::expandMEMCPY(MachineBasicBlock::iterator MI) const {  in expandMEMCPY()
1233   const ARMBaseInstrInfo *TII = Subtarget.getInstrInfo();  in expandMEMCPY()
1281 bool ARMBaseInstrInfo::expandPostRAPseudo(MachineInstr &MI) const {  in expandPostRAPseudo()
1406 void ARMBaseInstrInfo::reMaterialize(MachineBasicBlock &MBB,  in reMaterialize()
1434 MachineInstr *ARMBaseInstrInfo::duplicate(MachineInstr &Orig,  in duplicate()
1450 bool ARMBaseInstrInfo::produceSameValue(const MachineInstr &MI0,  in produceSameValue()
1545 bool ARMBaseInstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2,  in areLoadsFromSameBasePtr()
1626 bool ARMBaseInstrInfo::shouldScheduleLoadsNear(SDNode *Load1, SDNode *Load2,  in shouldScheduleLoadsNear()
1656 bool ARMBaseInstrInfo::isSchedulingBoundary(const MachineInstr &MI,  in isSchedulingBoundary()
1699 bool ARMBaseInstrInfo::
1742 bool ARMBaseInstrInfo::
1766 ARMBaseInstrInfo::isProfitableToUnpredicate(MachineBasicBlock &TMBB,  in isProfitableToUnpredicate()
1800 MachineInstr *ARMBaseInstrInfo::commuteInstructionImpl(MachineInstr &MI,  in commuteInstructionImpl()
1864 bool ARMBaseInstrInfo::analyzeSelect(const MachineInstr &MI,  in analyzeSelect()
1886 ARMBaseInstrInfo::optimizeSelect(MachineInstr &MI,  in optimizeSelect()
2002                                    const ARMBaseInstrInfo &TII,  in emitARMRegPlusImmediate()
2145                                 const ARMBaseInstrInfo &TII) {  in rewriteARMFrameIndex()
2287 bool ARMBaseInstrInfo::analyzeCompare(const MachineInstr &MI, unsigned &SrcReg,  in analyzeCompare()
2391 bool ARMBaseInstrInfo::optimizeCompareInstr(  in optimizeCompareInstr()
2639 bool ARMBaseInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,  in FoldImmediate()
3021 unsigned ARMBaseInstrInfo::getNumLDMAddresses(const MachineInstr &MI) const {  in getNumLDMAddresses()
3070 unsigned ARMBaseInstrInfo::getNumMicroOps(const InstrItineraryData *ItinData,  in getNumMicroOps()
3184 ARMBaseInstrInfo::getVLDMDefCycle(const InstrItineraryData *ItinData,  in getVLDMDefCycle()
3225 ARMBaseInstrInfo::getLDMDefCycle(const InstrItineraryData *ItinData,  in getLDMDefCycle()
3260 ARMBaseInstrInfo::getVSTMUseCycle(const InstrItineraryData *ItinData,  in getVSTMUseCycle()
3300 ARMBaseInstrInfo::getSTMUseCycle(const InstrItineraryData *ItinData,  in getSTMUseCycle()
3329 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,  in getOperandLatency()
3673 int ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,  in getOperandLatency()
3709 int ARMBaseInstrInfo::getOperandLatencyImpl(  in getOperandLatencyImpl()
3770 ARMBaseInstrInfo::getOperandLatency(const InstrItineraryData *ItinData,  in getOperandLatency()
3985 unsigned ARMBaseInstrInfo::getPredicationCost(const MachineInstr &MI) const {  in getPredicationCost()
4003 unsigned ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,  in getInstrLatency()
4053 int ARMBaseInstrInfo::getInstrLatency(const InstrItineraryData *ItinData,  in getInstrLatency()
4071 bool ARMBaseInstrInfo::hasHighOperandLatency(const TargetSchedModel &SchedModel,  in hasHighOperandLatency()
4092 bool ARMBaseInstrInfo::hasLowDefLatency(const TargetSchedModel &SchedModel,  in hasLowDefLatency()
4108 bool ARMBaseInstrInfo::verifyInstruction(const MachineInstr &MI,  in verifyInstruction()
4119 void ARMBaseInstrInfo::expandLoadStackGuardBase(MachineBasicBlock::iterator MI,  in expandLoadStackGuardBase()
4149 ARMBaseInstrInfo::isFpMLxInstruction(unsigned Opcode, unsigned &MulOpc,  in isFpMLxInstruction()
4184 ARMBaseInstrInfo::getExecutionDomain(const MachineInstr &MI) const {  in getExecutionDomain()
4274 void ARMBaseInstrInfo::setExecutionDomain(MachineInstr &MI,  in setExecutionDomain()
4482 unsigned ARMBaseInstrInfo::getPartialRegUpdateClearance(  in getPartialRegUpdateClearance()
4543 void ARMBaseInstrInfo::breakPartialRegDependency(  in breakPartialRegDependency()
4577 bool ARMBaseInstrInfo::hasNOP() const {  in hasNOP()
4581 bool ARMBaseInstrInfo::isSwiftFastImmShift(const MachineInstr *MI) const {  in isSwiftFastImmShift()
4595 bool ARMBaseInstrInfo::getRegSequenceLikeInputs(  in getRegSequenceLikeInputs()
4620 bool ARMBaseInstrInfo::getExtractSubregLikeInputs(  in getExtractSubregLikeInputs()
4641 bool ARMBaseInstrInfo::getInsertSubregLikeInputs(  in getInsertSubregLikeInputs()