Lines Matching refs:SupReg
1133 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() local
1135 MBB.addLiveIn(SupReg); in emitAlignedDPRCS2Spills()
1140 .addReg(SupReg, RegState::ImplicitKill)); in emitAlignedDPRCS2Spills()
1151 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() local
1153 MBB.addLiveIn(SupReg); in emitAlignedDPRCS2Spills()
1156 .addReg(SupReg, RegState::ImplicitKill)); in emitAlignedDPRCS2Spills()
1163 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Spills() local
1165 MBB.addLiveIn(SupReg); in emitAlignedDPRCS2Spills()
1167 .addReg(ARM::R4).addImm(16).addReg(SupReg)); in emitAlignedDPRCS2Spills()
1251 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() local
1256 .addReg(SupReg, RegState::ImplicitDefine)); in emitAlignedDPRCS2Restores()
1267 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() local
1271 .addReg(SupReg, RegState::ImplicitDefine)); in emitAlignedDPRCS2Restores()
1278 unsigned SupReg = TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, in emitAlignedDPRCS2Restores() local
1280 AddDefaultPred(BuildMI(MBB, MI, DL, TII.get(ARM::VLD1q64), SupReg) in emitAlignedDPRCS2Restores()