Lines Matching refs:ARM_AM
207 int Offset = isAM3 ? ARM_AM::getAM3Offset(OffField) in getMemoryOpOffset()
208 : ARM_AM::getAM5Offset(OffField) * 4; in getMemoryOpOffset()
209 ARM_AM::AddrOpc Op = isAM3 ? ARM_AM::getAM3Op(OffField) in getMemoryOpOffset()
210 : ARM_AM::getAM5Op(OffField); in getMemoryOpOffset()
212 if (Op == ARM_AM::sub) in getMemoryOpOffset()
226 static int getLoadStoreMultipleOpcode(unsigned Opcode, ARM_AM::AMSubMode Mode) { in getLoadStoreMultipleOpcode()
233 case ARM_AM::ia: return ARM::LDMIA; in getLoadStoreMultipleOpcode()
234 case ARM_AM::da: return ARM::LDMDA; in getLoadStoreMultipleOpcode()
235 case ARM_AM::db: return ARM::LDMDB; in getLoadStoreMultipleOpcode()
236 case ARM_AM::ib: return ARM::LDMIB; in getLoadStoreMultipleOpcode()
242 case ARM_AM::ia: return ARM::STMIA; in getLoadStoreMultipleOpcode()
243 case ARM_AM::da: return ARM::STMDA; in getLoadStoreMultipleOpcode()
244 case ARM_AM::db: return ARM::STMDB; in getLoadStoreMultipleOpcode()
245 case ARM_AM::ib: return ARM::STMIB; in getLoadStoreMultipleOpcode()
254 case ARM_AM::ia: return ARM::tLDMIA; in getLoadStoreMultipleOpcode()
262 case ARM_AM::ia: return ARM::tSTMIA_UPD; in getLoadStoreMultipleOpcode()
269 case ARM_AM::ia: return ARM::t2LDMIA; in getLoadStoreMultipleOpcode()
270 case ARM_AM::db: return ARM::t2LDMDB; in getLoadStoreMultipleOpcode()
277 case ARM_AM::ia: return ARM::t2STMIA; in getLoadStoreMultipleOpcode()
278 case ARM_AM::db: return ARM::t2STMDB; in getLoadStoreMultipleOpcode()
284 case ARM_AM::ia: return ARM::VLDMSIA; in getLoadStoreMultipleOpcode()
285 case ARM_AM::db: return 0; // Only VLDMSDB_UPD exists. in getLoadStoreMultipleOpcode()
291 case ARM_AM::ia: return ARM::VSTMSIA; in getLoadStoreMultipleOpcode()
292 case ARM_AM::db: return 0; // Only VSTMSDB_UPD exists. in getLoadStoreMultipleOpcode()
298 case ARM_AM::ia: return ARM::VLDMDIA; in getLoadStoreMultipleOpcode()
299 case ARM_AM::db: return 0; // Only VLDMDDB_UPD exists. in getLoadStoreMultipleOpcode()
305 case ARM_AM::ia: return ARM::VSTMDIA; in getLoadStoreMultipleOpcode()
306 case ARM_AM::db: return 0; // Only VSTMDDB_UPD exists. in getLoadStoreMultipleOpcode()
311 static ARM_AM::AMSubMode getLoadStoreMultipleSubMode(unsigned Opcode) { in getLoadStoreMultipleSubMode()
335 return ARM_AM::ia; in getLoadStoreMultipleSubMode()
341 return ARM_AM::da; in getLoadStoreMultipleSubMode()
355 return ARM_AM::db; in getLoadStoreMultipleSubMode()
361 return ARM_AM::ib; in getLoadStoreMultipleSubMode()
621 ARM_AM::AMSubMode Mode = ARM_AM::ia; in CreateLoadStoreMulti()
627 Mode = ARM_AM::ib; in CreateLoadStoreMulti()
629 Mode = ARM_AM::da; in CreateLoadStoreMulti()
632 Mode = ARM_AM::db; in CreateLoadStoreMulti()
1057 ARM_AM::AMSubMode Mode) { in getUpdatingLSMultipleOpcode()
1066 case ARM_AM::ia: return ARM::LDMIA_UPD; in getUpdatingLSMultipleOpcode()
1067 case ARM_AM::ib: return ARM::LDMIB_UPD; in getUpdatingLSMultipleOpcode()
1068 case ARM_AM::da: return ARM::LDMDA_UPD; in getUpdatingLSMultipleOpcode()
1069 case ARM_AM::db: return ARM::LDMDB_UPD; in getUpdatingLSMultipleOpcode()
1077 case ARM_AM::ia: return ARM::STMIA_UPD; in getUpdatingLSMultipleOpcode()
1078 case ARM_AM::ib: return ARM::STMIB_UPD; in getUpdatingLSMultipleOpcode()
1079 case ARM_AM::da: return ARM::STMDA_UPD; in getUpdatingLSMultipleOpcode()
1080 case ARM_AM::db: return ARM::STMDB_UPD; in getUpdatingLSMultipleOpcode()
1086 case ARM_AM::ia: return ARM::t2LDMIA_UPD; in getUpdatingLSMultipleOpcode()
1087 case ARM_AM::db: return ARM::t2LDMDB_UPD; in getUpdatingLSMultipleOpcode()
1093 case ARM_AM::ia: return ARM::t2STMIA_UPD; in getUpdatingLSMultipleOpcode()
1094 case ARM_AM::db: return ARM::t2STMDB_UPD; in getUpdatingLSMultipleOpcode()
1099 case ARM_AM::ia: return ARM::VLDMSIA_UPD; in getUpdatingLSMultipleOpcode()
1100 case ARM_AM::db: return ARM::VLDMSDB_UPD; in getUpdatingLSMultipleOpcode()
1105 case ARM_AM::ia: return ARM::VLDMDIA_UPD; in getUpdatingLSMultipleOpcode()
1106 case ARM_AM::db: return ARM::VLDMDDB_UPD; in getUpdatingLSMultipleOpcode()
1111 case ARM_AM::ia: return ARM::VSTMSIA_UPD; in getUpdatingLSMultipleOpcode()
1112 case ARM_AM::db: return ARM::VSTMSDB_UPD; in getUpdatingLSMultipleOpcode()
1117 case ARM_AM::ia: return ARM::VSTMDIA_UPD; in getUpdatingLSMultipleOpcode()
1118 case ARM_AM::db: return ARM::VSTMDDB_UPD; in getUpdatingLSMultipleOpcode()
1228 ARM_AM::AMSubMode Mode = getLoadStoreMultipleSubMode(Opcode); in MergeBaseUpdateLSMultiple()
1229 if (Mode == ARM_AM::ia && Offset == -Bytes) { in MergeBaseUpdateLSMultiple()
1230 Mode = ARM_AM::db; in MergeBaseUpdateLSMultiple()
1231 } else if (Mode == ARM_AM::ib && Offset == -Bytes) { in MergeBaseUpdateLSMultiple()
1232 Mode = ARM_AM::da; in MergeBaseUpdateLSMultiple()
1235 if (((Mode != ARM_AM::ia && Mode != ARM_AM::ib) || Offset != Bytes) && in MergeBaseUpdateLSMultiple()
1236 ((Mode != ARM_AM::da && Mode != ARM_AM::db) || Offset != -Bytes)) { in MergeBaseUpdateLSMultiple()
1279 ARM_AM::AddrOpc Mode) { in getPreIndexedLoadStoreOpcode()
1286 return Mode == ARM_AM::add ? ARM::VLDMSIA_UPD : ARM::VLDMSDB_UPD; in getPreIndexedLoadStoreOpcode()
1288 return Mode == ARM_AM::add ? ARM::VLDMDIA_UPD : ARM::VLDMDDB_UPD; in getPreIndexedLoadStoreOpcode()
1290 return Mode == ARM_AM::add ? ARM::VSTMSIA_UPD : ARM::VSTMSDB_UPD; in getPreIndexedLoadStoreOpcode()
1292 return Mode == ARM_AM::add ? ARM::VSTMDIA_UPD : ARM::VSTMDDB_UPD; in getPreIndexedLoadStoreOpcode()
1304 ARM_AM::AddrOpc Mode) { in getPostIndexedLoadStoreOpcode()
1311 return Mode == ARM_AM::add ? ARM::VLDMSIA_UPD : ARM::VLDMSDB_UPD; in getPostIndexedLoadStoreOpcode()
1313 return Mode == ARM_AM::add ? ARM::VLDMDIA_UPD : ARM::VLDMDDB_UPD; in getPostIndexedLoadStoreOpcode()
1315 return Mode == ARM_AM::add ? ARM::VSTMSIA_UPD : ARM::VSTMSDB_UPD; in getPostIndexedLoadStoreOpcode()
1317 return Mode == ARM_AM::add ? ARM::VSTMDIA_UPD : ARM::VSTMDDB_UPD; in getPostIndexedLoadStoreOpcode()
1345 if (isAM5 && ARM_AM::getAM5Offset(MI->getOperand(2).getImm()) != 0) in MergeBaseUpdateLoadStore()
1363 NewOpc = getPreIndexedLoadStoreOpcode(Opcode, ARM_AM::add); in MergeBaseUpdateLoadStore()
1365 NewOpc = getPreIndexedLoadStoreOpcode(Opcode, ARM_AM::sub); in MergeBaseUpdateLoadStore()
1369 NewOpc = getPostIndexedLoadStoreOpcode(Opcode, ARM_AM::add); in MergeBaseUpdateLoadStore()
1371 NewOpc = getPostIndexedLoadStoreOpcode(Opcode, ARM_AM::sub); in MergeBaseUpdateLoadStore()
1377 ARM_AM::AddrOpc AddSub = Offset < 0 ? ARM_AM::sub : ARM_AM::add; in MergeBaseUpdateLoadStore()
1400 int Imm = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
1417 int Imm = ARM_AM::getAM2Opc(AddSub, Bytes, ARM_AM::no_shift); in MergeBaseUpdateLoadStore()
2109 ARM_AM::AddrOpc AddSub = ARM_AM::add; in CanFormLdStDWord()
2111 AddSub = ARM_AM::sub; in CanFormLdStDWord()
2117 Offset = ARM_AM::getAM3Opc(AddSub, OffImm); in CanFormLdStDWord()
2170 = getLoadStoreMultipleOpcode(Op->getOpcode(), ARM_AM::ia); in RescheduleOps()