Lines Matching refs:ShiftReg

537     unsigned ShiftReg;
1806     Inst.addOperand(MCOperand::createReg(RegShiftedReg.ShiftReg));
2650                         unsigned ShiftReg, unsigned ShiftImm, SMLoc S,
2655     Op->RegShiftedReg.ShiftReg = ShiftReg;
2954        << " " << RegShiftedReg.ShiftReg << ">";
3123   int ShiftReg = 0;
3128     ShiftReg = SrcReg;
3163       ShiftReg = tryParseRegister();
3164       if (ShiftReg == -1) {
3175   if (ShiftReg && ShiftTy != ARM_AM::rrx)
3177                                                          ShiftReg, Imm,