Lines Matching full:instructions

27   // addresses used in LDRD/LDRH/LDRB/etc. instructions. All bits are encoded.
30   // used in VFP instructions where the lower 2 bits are not encoded
34   // the short-swapped encoding of Thumb2 instructions.
37   // used in VFP instructions where bit 0 not encoded (so it's encoded as an
41   // the short-swapped encoding of Thumb2 instructions.
54   // instructions. 
57   // branch instructions. (unconditional)
60   // uconditional branch instructions.
63   // branch unconditional branch instructions.
66   // fixup_arm_thumb_br - 12-bit fixup for Thumb B instructions.
69   // The following fixups handle the ARM BL instructions. These can be
78   // fixup_arm_uncondbl - Fixup for unconditional ARM BL instructions.
81   // fixup_arm_condbl - Fixup for ARM BL instructions with nontrivial
85   // fixup_arm_blx - Fixup for ARM BLX instructions.
88   // fixup_arm_thumb_bl - Fixup for Thumb BL instructions.
91   // fixup_arm_thumb_blx - Fixup for Thumb BLX instructions.
94   // fixup_arm_thumb_cb - Fixup for Thumb branch instructions.
100   // fixup_arm_thumb_bcc - Fixup for Thumb conditional branching instructions.