Lines Matching refs:v64i8
198 LocVT == MVT::v64i8 || LocVT == MVT::v512i1) { in CC_Hexagon_VarArg()
338 LocVT == MVT::v64i8 || LocVT == MVT::v512i1)) { in CC_HexagonVector()
412 } else if (LocVT == MVT::v64i8 || LocVT == MVT::v32i16 || in RetCC_Hexagon()
544 ty == MVT::v64i8 || in IsHvxVectorType()
902 VT == MVT::v32i16 || VT == MVT::v64i8); in getIndexedAddressParts()
1119 RegVT == MVT::v32i16 || RegVT == MVT::v64i8)) { in LowerFormalArguments()
1755 addRegisterClass(MVT::v64i8, &Hexagon::VectorRegsRegClass); in HexagonTargetLowering()
2875 case MVT::v64i8: in getRegForInlineAsmConstraint()
2885 case MVT::v64i8: in getRegForInlineAsmConstraint()
3028 case MVT::v64i8: in allowsMisalignedMemoryAccesses()
3055 case MVT::v64i8: in findRepresentativeClass()