Lines Matching refs:SLOT2

71 //    | SLOT2     |  XTYPE          ALU32     J         JR           |
107 ProcessorItineraries<[SLOT0, SLOT1, SLOT2, SLOT3, SLOT_ENDLOOP,
112 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
114 [InstrStage<2, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
116 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
118 [InstrStage<2, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
120 [InstrStage<2, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
122 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
125 InstrItinData<ALU64_tc_1_SLOT23 , [InstrStage<1, [SLOT2, SLOT3]>]>,
126 InstrItinData<ALU64_tc_2_SLOT23 , [InstrStage<2, [SLOT2, SLOT3]>]>,
127 InstrItinData<ALU64_tc_2early_SLOT23, [InstrStage<2, [SLOT2, SLOT3]>]>,
128 InstrItinData<ALU64_tc_3x_SLOT23 , [InstrStage<3, [SLOT2, SLOT3]>]>,
136 InstrItinData<CR_tc_2early_SLOT23, [InstrStage<2, [SLOT2, SLOT3]>]>,
137 InstrItinData<CR_tc_3x_SLOT23 , [InstrStage<3, [SLOT2, SLOT3]>]>,
138 InstrItinData<CJ_tc_1_SLOT23 , [InstrStage<1, [SLOT2, SLOT3]>]>,
139 InstrItinData<CJ_tc_2early_SLOT23, [InstrStage<2, [SLOT2, SLOT3]>]>,
140 InstrItinData<J_tc_2early_SLOT23 , [InstrStage<2, [SLOT2, SLOT3]>]>,
141 InstrItinData<J_tc_2early_CJUMP_UCJUMP_ARCHDEPSLOT , [InstrStage<1, [SLOT2, SLOT3]>]>,
144 InstrItinData<J_tc_2early_SLOT2 , [InstrStage<2, [SLOT2]>]>,
145 InstrItinData<J_tc_3stall_SLOT2 , [InstrStage<3, [SLOT2]>]>,
149 [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
157 InstrItinData<M_tc_1_SLOT23 , [InstrStage<1, [SLOT2, SLOT3]>]>,
158 InstrItinData<M_tc_2_SLOT23 , [InstrStage<2, [SLOT2, SLOT3]>]>,
159 InstrItinData<M_tc_3_SLOT23 , [InstrStage<3, [SLOT2, SLOT3]>]>,
160 InstrItinData<M_tc_3x_SLOT23 , [InstrStage<3, [SLOT2, SLOT3]>]>,
161 InstrItinData<M_tc_3or4x_SLOT23 , [InstrStage<4, [SLOT2, SLOT3]>]>,
162 InstrItinData<M_tc_3stall_SLOT23, [InstrStage<3, [SLOT2, SLOT3]>]>,
181 InstrItinData<S_2op_tc_1_SLOT23 , [InstrStage<1, [SLOT2, SLOT3]>]>,
182 InstrItinData<S_2op_tc_2_SLOT23 , [InstrStage<2, [SLOT2, SLOT3]>]>,
183 InstrItinData<S_2op_tc_2early_SLOT23, [InstrStage<2, [SLOT2, SLOT3]>]>,
185 InstrItinData<S_2op_tc_3or4x_SLOT23 , [InstrStage<4, [SLOT2, SLOT3]>]>,
186 InstrItinData<S_3op_tc_1_SLOT23 , [InstrStage<1, [SLOT2, SLOT3]>]>,
187 InstrItinData<S_3op_tc_2_SLOT23 , [InstrStage<2, [SLOT2, SLOT3]>]>,
188 InstrItinData<S_3op_tc_2early_SLOT23, [InstrStage<2, [SLOT2, SLOT3]>]>,
189 InstrItinData<S_3op_tc_3_SLOT23 , [InstrStage<3, [SLOT2, SLOT3]>]>,
190 InstrItinData<S_3op_tc_3stall_SLOT23, [InstrStage<3, [SLOT2, SLOT3]>]>,
191 InstrItinData<S_3op_tc_3x_SLOT23 , [InstrStage<3, [SLOT2, SLOT3]>]>,
211 [InstrStage<3, [SLOT2, SLOT3]>]>,
213 [InstrStage<3, [SLOT2, SLOT3]>]>,
215 [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
219 InstrItinData<COMPOUND_CJ_ARCHDEPSLOT , [InstrStage<1, [SLOT2, SLOT3]>]>,
220 InstrItinData<COMPOUND , [InstrStage<1, [SLOT2, SLOT3]>]>,
222 InstrItinData<PREFIX , [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
223 InstrItinData<PSEUDO , [InstrStage<1, [SLOT0, SLOT1, SLOT2, SLOT3]>]>,
224 InstrItinData<PSEUDOM , [InstrStage<1, [SLOT2, SLOT3], 0>,
225 InstrStage<1, [SLOT2, SLOT3]>]>,
228 InstrItinData<CVI_VA,[InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
232 [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
234 InstrItinData<CVI_VX_LONG, [InstrStage<1, [SLOT2, SLOT3], 0>,
236 InstrItinData<CVI_VX_LATE, [InstrStage<1, [SLOT2, SLOT3], 0>,
238 InstrItinData<CVI_VX,[InstrStage<1, [SLOT2, SLOT3], 0>,
241 [InstrStage<1, [SLOT2, SLOT3], 0>,
244 [InstrStage<1, [SLOT2, SLOT3], 0>,
247 [InstrStage<1, [SLOT2], 0>,
249 InstrItinData<CVI_VP, [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
251 InstrItinData<CVI_VP_LONG, [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
254 [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
257 [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
260 [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
263 [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
265 InstrItinData<CVI_VP_DV , [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
268 [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
271 [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,
297 InstrItinData<CVI_HIST , [InstrStage<1, [SLOT0,SLOT1,SLOT2,SLOT3], 0>,