Lines Matching refs:LoSR
765 unsigned LoSR = subreg_loreg; in splitShift() local
771 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
796 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
799 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
802 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
808 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR) in splitShift()
830 .addReg(Op1.getReg(), RS & ~RegState::Kill, (Left ? LoSR : HiSR)); in splitShift()
842 .addReg(Op1.getReg(), RS & ~RegState::Kill, LoSR); in splitShift()
848 .addReg(Op1.getReg(), RS & ~RegState::Kill, (Left ? LoSR : HiSR)) in splitShift()
886 unsigned LoSR = subreg_loreg; in splitAslOr() local
906 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR) in splitAslOr()
907 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR); in splitAslOr()
913 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR) in splitAslOr()
914 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
918 .addReg(Op2.getReg(), RS2 & ~RegState::Kill, LoSR) in splitAslOr()
935 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR); in splitAslOr()
938 .addReg(Op2.getReg(), RS2, LoSR); in splitAslOr()
946 .addReg(Op1.getReg(), RS1 & ~RegState::Kill, LoSR); in splitAslOr()
949 .addReg(Op2.getReg(), RS2, LoSR) in splitAslOr()