Lines Matching refs:opstr
185 class CompactBranchMM<string opstr, DAGOperand opnd, PatFrag cond_op,
188 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZC, FrmI> {
196 class LoadLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
199 !strconcat(opstr, "\t$rt, $addr"),
206 class StoreLeftRightMM<string opstr, SDNode OpNode, RegisterOperand RO,
209 !strconcat(opstr, "\t$rt, $addr"),
229 class MovePMM16<string opstr, RegisterOperand RO> :
231 !strconcat(opstr, "\t$dst_regs, $rs, $rt"), [],
251 class StorePairMM<string opstr, InstrItinClass Itin = NoItinerary,
254 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
259 class LoadPairMM<string opstr, InstrItinClass Itin = NoItinerary,
262 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
267 class LLBaseMM<string opstr, RegisterOperand RO> :
269 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
274 class LLEBaseMM<string opstr, RegisterOperand RO> :
276 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
281 class SCBaseMM<string opstr, RegisterOperand RO> :
283 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
289 class SCEBaseMM<string opstr, RegisterOperand RO> :
291 !strconcat(opstr, "\t$rt, $addr"), [], NoItinerary, FrmI> {
297 class LoadMM<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag,
300 !strconcat(opstr, "\t$rt, $addr"),
301 [(set RO:$rt, (OpNode addrimm12:$addr))], Itin, FrmI, opstr> {
307 class ArithRMM16<string opstr, RegisterOperand RO, bit isComm = 0,
311 !strconcat(opstr, "\t$rd, $rs, $rt"),
316 class AndImmMM16<string opstr, RegisterOperand RO,
319 !strconcat(opstr, "\t$rd, $rs, $imm"), [], Itin, FrmI>;
321 class LogicRMM16<string opstr, RegisterOperand RO,
325 !strconcat(opstr, "\t$rt, $rs"),
331 class NotMM16<string opstr, RegisterOperand RO> :
333 !strconcat(opstr, "\t$rt, $rs"),
336 class ShiftIMM16<string opstr, Operand ImmOpnd, RegisterOperand RO,
339 !strconcat(opstr, "\t$rd, $rt, $shamt"), [], Itin, FrmR>;
341 class LoadMM16<string opstr, DAGOperand RO, SDPatternOperator OpNode,
344 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI> {
350 class StoreMM16<string opstr, DAGOperand RTOpnd, DAGOperand RO,
354 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI> {
359 class LoadSPMM16<string opstr, DAGOperand RO, InstrItinClass Itin,
362 !strconcat(opstr, "\t$rt, $offset"), [], Itin, FrmI> {
368 class StoreSPMM16<string opstr, DAGOperand RO, InstrItinClass Itin,
371 !strconcat(opstr, "\t$rt, $offset"), [], Itin, FrmI> {
376 class LoadGPMM16<string opstr, DAGOperand RO, InstrItinClass Itin,
379 !strconcat(opstr, "\t$rt, $offset"), [], Itin, FrmI> {
385 class AddImmUR2<string opstr, RegisterOperand RO> :
387 !strconcat(opstr, "\t$rd, $rs, $imm"),
392 class AddImmUS5<string opstr, RegisterOperand RO> :
394 !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR> {
398 class AddImmUR1SP<string opstr, RegisterOperand RO> :
400 !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmR>;
402 class AddImmUSP<string opstr> :
404 !strconcat(opstr, "\t$imm"), [], NoItinerary, FrmI>;
406 class MoveFromHILOMM<string opstr, RegisterOperand RO, Register UseReg> :
407 MicroMipsInst16<(outs RO:$rd), (ins), !strconcat(opstr, "\t$rd"),
413 class MoveMM16<string opstr, RegisterOperand RO, bit isComm = 0,
416 !strconcat(opstr, "\t$rd, $rs"), [], Itin, FrmR> {
421 class LoadImmMM16<string opstr, Operand Od, RegisterOperand RO> :
423 !strconcat(opstr, "\t$rd, $imm"), [], NoItinerary, FrmI> {
428 class JumpLinkRegMM16<string opstr, RegisterOperand RO> :
429 MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
437 class JumpRegMM16<string opstr, RegisterOperand RO> :
438 MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
456 class JumpLinkRegSMM16<string opstr, RegisterOperand RO> :
457 MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
465 class JumpRegCMM16<string opstr, RegisterOperand RO> :
466 MicroMipsInst16<(outs), (ins RO:$rs), !strconcat(opstr, "\t$rs"),
475 class BrkSdbbp16MM<string opstr> :
477 !strconcat(opstr, "\t$code_"),
480 class CBranchZeroMM<string opstr, DAGOperand opnd, RegisterOperand RO> :
482 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZ, FrmI> {
491 class JumpLinkMM<string opstr, DAGOperand opnd> :
492 InstSE<(outs), (ins opnd:$target), !strconcat(opstr, "\t$target"),
493 [], II_JALS, FrmJ, opstr> {
497 class JumpLinkRegMM<string opstr, RegisterOperand RO>:
498 InstSE<(outs RO:$rd), (ins RO:$rs), !strconcat(opstr, "\t$rd, $rs"),
501 class BranchCompareToZeroLinkMM<string opstr, DAGOperand opnd,
504 !strconcat(opstr, "\t$rs, $offset"), [], II_BCCZALS, FrmI, opstr>;
507 class LoadWordIndexedScaledMM<string opstr, RegisterOperand RO,
511 !strconcat(opstr, "\t$rd, ${index}(${base})"), [], Itin, FrmFI>;
513 class PrefetchIndexed<string opstr> :
515 !strconcat(opstr, "\t$hint, ${index}(${base})"), [], NoItinerary, FrmOther>;
517 class AddImmUPC<string opstr, RegisterOperand RO> :
519 !strconcat(opstr, "\t$rs, $imm"), [], NoItinerary, FrmR>;
548 class StoreMultMM<string opstr,
551 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
556 class LoadMultMM<string opstr,
559 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI, opstr> {
564 class StoreMultMM16<string opstr,
568 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI> {
573 class LoadMultMM16<string opstr,
577 !strconcat(opstr, "\t$rt, $addr"), [], Itin, FrmI> {
582 class UncondBranchMM16<string opstr> :
584 !strconcat(opstr, "\t$offset"),
666 class WaitMM<string opstr> :
667 InstSE<(outs), (ins uimm10:$code_), !strconcat(opstr, "\t$code_"), [],
668 NoItinerary, FrmOther, opstr>;
1054 class UncondBranchMMPseudo<string opstr> :
1056 !strconcat(opstr, "\t$offset")>;