53                                const MCSubtargetInfo &STI) const;
56                              const MCSubtargetInfo &STI) const;
59                                   const MCSubtargetInfo &STI) const;
62                                 const MCSubtargetInfo &STI) const;
65                              const MCSubtargetInfo &STI) const;
68                             const MCSubtargetInfo &STI) const;
71                              const MCSubtargetInfo &STI) const;
74                                const MCSubtargetInfo &STI) const;
77                               const MCSubtargetInfo &STI) const;
80                               const MCSubtargetInfo &STI) const;
83                               const MCSubtargetInfo &STI) const;
86                              const MCSubtargetInfo &STI) const;
89                               const MCSubtargetInfo &STI) const;
92                                const MCSubtargetInfo &STI) const;
98                              const MCSubtargetInfo &STI) const;
104                                  const MCSubtargetInfo &STI) const;
107                          const MCSubtargetInfo &STI) const override {  in encodeInstruction()
111     uint64_t Bits = getBinaryCodeForInstr(MI, Fixups, STI);  in encodeInstruction()
155                     const MCSubtargetInfo &STI) const {  in getDirectBrEncoding()
157   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getDirectBrEncoding()
167                                      const MCSubtargetInfo &STI) const {  in getCondBrEncoding()
169   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getCondBrEncoding()
180                        const MCSubtargetInfo &STI) const {  in getAbsDirectBrEncoding()
182   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getAbsDirectBrEncoding()
193                      const MCSubtargetInfo &STI) const {  in getAbsCondBrEncoding()
195   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getAbsCondBrEncoding()
205                                        const MCSubtargetInfo &STI) const {  in getImm16Encoding()
207   if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);  in getImm16Encoding()
217                                             const MCSubtargetInfo &STI) const {  in getMemRIEncoding()
221   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 16;  in getMemRIEncoding()
225     return (getMachineOpValue(MI, MO, Fixups, STI) & 0xFFFF) | RegBits;  in getMemRIEncoding()
236                                        const MCSubtargetInfo &STI) const {  in getMemRIXEncoding()
240   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 14;  in getMemRIXEncoding()
244     return ((getMachineOpValue(MI, MO, Fixups, STI) >> 2) & 0x3FFF) | RegBits;  in getMemRIXEncoding()
254                                        const MCSubtargetInfo &STI) const {  in getMemRIX16Encoding()
258   unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 12;  in getMemRIX16Encoding()
263   return ((getMachineOpValue(MI, MO, Fixups, STI) >> 4) & 0xFFF) | RegBits;  in getMemRIX16Encoding()
268                                               const MCSubtargetInfo &STI)  in getSPE8DisEncoding()
273   uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 5;  in getSPE8DisEncoding()
277   uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 3;  in getSPE8DisEncoding()
284                                               const MCSubtargetInfo &STI)  in getSPE4DisEncoding()
289   uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 5;  in getSPE4DisEncoding()
293   uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 2;  in getSPE4DisEncoding()
300                                               const MCSubtargetInfo &STI)  in getSPE2DisEncoding()
305   uint32_t RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups, STI) << 5;  in getSPE2DisEncoding()
309   uint32_t Imm = getMachineOpValue(MI, MO, Fixups, STI) >> 1;  in getSPE2DisEncoding()
316                                        const MCSubtargetInfo &STI) const {  in getTLSRegEncoding()
318   if (MO.isReg()) return getMachineOpValue(MI, MO, Fixups, STI);  in getTLSRegEncoding()
325   const Triple &TT = STI.getTargetTriple();  in getTLSRegEncoding()
332                                        const MCSubtargetInfo &STI) const {  in getTLSCallEncoding()
339   return getDirectBrEncoding(MI, OpNo, Fixups, STI);  in getTLSCallEncoding()
345                     const MCSubtargetInfo &STI) const {  in get_crbitm_encoding()
357                   const MCSubtargetInfo &STI) const {  in getMachineOpValue()