Lines Matching refs:hasQPX
674 if (Subtarget.hasQPX()) { in PPCTargetLowering()
997 if (Subtarget.hasAltivec() || Subtarget.hasQPX()) in getByValTypeAlignment()
998 getMaxByValAlign(Ty, Align, Subtarget.hasQPX() ? 32 : 16); in getByValTypeAlignment()
1108 if (Subtarget.hasQPX()) in getSetCCResultType()
1998 if (!Subtarget.hasQPX() || (VT != MVT::v4f64 && VT != MVT::v4f32)) { in getPreIndexedAddressParts()
2968 RC = Subtarget.hasQPX() ? &PPC::QSRCRegClass : &PPC::VRRCRegClass; in LowerFormalArguments_32SVR4()
3184 Subtarget.hasQPX())) in LowerFormalArguments_64SVR4()
3433 if (!Subtarget.hasQPX()) { in LowerFormalArguments_64SVR4()
3997 Subtarget.hasQPX())) in needStackSlotPassParameters()
5084 if (Subtarget.hasQPX()) { in LowerCall_64SVR4()
5451 if (!Subtarget.hasQPX()) { in LowerCall_64SVR4()
6614 if (Subtarget.hasQPX() && Op.getOperand(0).getValueType() == MVT::v4i1) { in LowerINT_TO_FP()
7092 if (Subtarget.hasQPX() && Op.getValueType() == MVT::v4i1) { in LowerBUILD_VECTOR()
7196 if (Subtarget.hasQPX()) in LowerBUILD_VECTOR()
7482 if (Subtarget.hasQPX()) { in LowerVECTOR_SHUFFLE()
9461 (VT == MVT::v4f32 && Subtarget.hasQPX()) || in getRsqrtEstimate()
9462 (VT == MVT::v4f64 && Subtarget.hasQPX())) { in getRsqrtEstimate()
9483 (VT == MVT::v4f32 && Subtarget.hasQPX()) || in getRecipEstimate()
9484 (VT == MVT::v4f64 && Subtarget.hasQPX())) { in getRecipEstimate()
10771 (Subtarget.hasQPX() && (VT == MVT::v4f64 || VT == MVT::v4f32) && in PerformDAGCombine()
11425 if (VT == MVT::v4f64 && Subtarget.hasQPX()) in getRegForInlineAsmConstraint()
11427 if (VT == MVT::v4f32 && Subtarget.hasQPX()) in getRegForInlineAsmConstraint()
11431 if (VT == MVT::v4f64 && Subtarget.hasQPX()) in getRegForInlineAsmConstraint()
11433 if (VT == MVT::v4f32 && Subtarget.hasQPX()) in getRegForInlineAsmConstraint()
11898 if (Subtarget.hasQPX() && Size >= 32 && (!IsMemset || Size >= 64) && in getOptimalMemOpType()
12059 if (Subtarget.hasVSX() || Subtarget.hasQPX()) in shouldExpandBuildVectorWithShuffles()