Lines Matching refs:LIS

229                                 const LiveIntervals &LIS)  in GetVRegDef()  argument
236 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( in GetVRegDef()
237 LIS.getInstructionIndex(*Insert))) in GetVRegDef()
238 return LIS.getInstructionFromIndex(ValNo->def); in GetVRegDef()
248 LiveIntervals &LIS) { in HasOneUse() argument
254 const LiveInterval &LI = LIS.getInterval(Reg); in HasOneUse()
256 LIS.getInstructionIndex(*Def).getRegSlot()); in HasOneUse()
259 const auto &Result = LI.Query(LIS.getInstructionIndex(*I.getParent())); in HasOneUse()
277 AliasAnalysis &AA, const LiveIntervals &LIS, in IsSafeToMove() argument
310 const LiveInterval &LI = LIS.getInterval(Reg); in IsSafeToMove()
313 LI.getVNInfoAt(LIS.getInstructionIndex(*Def).getRegSlot()) : in IsSafeToMove()
314 LI.getVNInfoBefore(LIS.getInstructionIndex(*Def)); in IsSafeToMove()
316 VNInfo *InsVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(*Insert)); in IsSafeToMove()
356 LiveIntervals &LIS, in OneUseDominatesOtherUses() argument
358 const LiveInterval &LI = LIS.getInterval(Reg); in OneUseDominatesOtherUses()
361 VNInfo *OneUseVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(*OneUseInst)); in OneUseDominatesOtherUses()
368 VNInfo *UseVNI = LI.getVNInfoBefore(LIS.getInstructionIndex(*UseInst)); in OneUseDominatesOtherUses()
425 static void ShrinkToUses(LiveInterval &LI, LiveIntervals &LIS) { in ShrinkToUses() argument
426 if (LIS.shrinkToUses(&LI)) { in ShrinkToUses()
428 LIS.splitSeparateComponents(LI, SplitLIs); in ShrinkToUses()
437 MachineInstr *Insert, LiveIntervals &LIS, in MoveForSingleUse() argument
443 LIS.handleMove(*Def); in MoveForSingleUse()
457 LIS.createAndComputeVirtRegInterval(NewReg); in MoveForSingleUse()
460 LiveInterval &LI = LIS.getInterval(Reg); in MoveForSingleUse()
461 LI.removeSegment(LIS.getInstructionIndex(*Def).getRegSlot(), in MoveForSingleUse()
462 LIS.getInstructionIndex(*Op.getParent()).getRegSlot(), in MoveForSingleUse()
478 MachineBasicBlock::instr_iterator Insert, LiveIntervals &LIS, in RematerializeCheapDef() argument
488 LIS.InsertMachineInstrInMaps(*Clone); in RematerializeCheapDef()
489 LIS.createAndComputeVirtRegInterval(NewReg); in RematerializeCheapDef()
498 LiveInterval &LI = LIS.getInterval(Reg); in RematerializeCheapDef()
499 ShrinkToUses(LI, LIS); in RematerializeCheapDef()
500 IsDead = !LI.liveAt(LIS.getInstructionIndex(Def).getDeadSlot()); in RematerializeCheapDef()
506 SlotIndex Idx = LIS.getInstructionIndex(Def).getRegSlot(); in RematerializeCheapDef()
507 LIS.removePhysRegDefAt(WebAssembly::ARGUMENTS, Idx); in RematerializeCheapDef()
508 LIS.removeInterval(Reg); in RematerializeCheapDef()
509 LIS.RemoveMachineInstrFromMaps(Def); in RematerializeCheapDef()
538 MachineInstr *Insert, LiveIntervals &LIS, WebAssemblyFunctionInfo &MFI, in MoveAndTeeForMultiUse() argument
544 LIS.handleMove(*Def); in MoveAndTeeForMultiUse()
557 SlotIndex TeeIdx = LIS.InsertMachineInstrInMaps(*Tee).getRegSlot(); in MoveAndTeeForMultiUse()
558 SlotIndex DefIdx = LIS.getInstructionIndex(*Def).getRegSlot(); in MoveAndTeeForMultiUse()
561 LiveInterval &LI = LIS.getInterval(Reg); in MoveAndTeeForMultiUse()
566 ShrinkToUses(LI, LIS); in MoveAndTeeForMultiUse()
569 LIS.createAndComputeVirtRegInterval(TeeReg); in MoveAndTeeForMultiUse()
570 LIS.createAndComputeVirtRegInterval(DefReg); in MoveAndTeeForMultiUse()
715 LiveIntervals &LIS = getAnalysis<LiveIntervals>(); in runOnMachineFunction() local
754 MachineInstr *Def = GetVRegDef(Reg, Insert, MRI, LIS); in runOnMachineFunction()
778 bool CanMove = SameBlock && IsSafeToMove(Def, Insert, AA, LIS, MRI) && in runOnMachineFunction()
780 if (CanMove && HasOneUse(Reg, Def, MRI, MDT, LIS)) { in runOnMachineFunction()
781 Insert = MoveForSingleUse(Reg, Op, Def, MBB, Insert, LIS, MFI, MRI); in runOnMachineFunction()
785 LIS, MFI, MRI, TII, TRI); in runOnMachineFunction()
787 OneUseDominatesOtherUses(Reg, Op, MBB, MRI, MDT, LIS, MFI)) { in runOnMachineFunction()
788 Insert = MoveAndTeeForMultiUse(Reg, Op, Def, MBB, Insert, LIS, MFI, in runOnMachineFunction()