Lines Matching refs:OpSize16

1062                 "nop{w}\t$zero", [], IIC_NOP>, TB, OpSize16;
1095                 IIC_POP_REG16>, OpSize16;
1099                 IIC_POP_REG>, OpSize16;
1101                 IIC_POP_MEM>, OpSize16;
1110                  IIC_PUSH_REG>, OpSize16;
1114                  IIC_PUSH_REG>, OpSize16;
1119                    "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16;
1121                    "push{w}\t$imm", [], IIC_PUSH_IMM>, OpSize16;
1133                  IIC_PUSH_MEM>, OpSize16;
1169                 OpSize16;
1177                  OpSize16;
1225                OpSize16, Requires<[Not64BitMode]>;
1232                OpSize16, Requires<[Not64BitMode]>;
1252                   IIC_BIT_SCAN_REG>, PS, OpSize16, Sched<[WriteShift]>;
1256                   IIC_BIT_SCAN_MEM>, PS, OpSize16, Sched<[WriteShiftLd]>;
1277                  IIC_BIT_SCAN_REG>, PS, OpSize16, Sched<[WriteShift]>;
1281                  IIC_BIT_SCAN_MEM>, PS, OpSize16, Sched<[WriteShiftLd]>;
1306               "movsw\t{$src, $dst|$dst, $src}", [], IIC_MOVS>, OpSize16;
1319               "stosw\t{%ax, $dst|$dst, ax}", [], IIC_STOS>, OpSize16;
1333               "scasw\t{$dst, %ax|ax, $dst}", [], IIC_SCAS>, OpSize16;
1346               "cmpsw\t{$dst, $src|$src, $dst}", [], IIC_CMPS>, OpSize16;
1362                 "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV>, OpSize16;
1375                    [(set GR16:$dst, imm:$src)], IIC_MOV>, OpSize16;
1394                    "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV>, OpSize16;
1406                    [(store (i16 imm16_su:$src), addr:$dst)], IIC_MOV_MEM>, OpSize16;
1428                      OpSize16, AdSize32;
1444                      OpSize16, AdSize16;
1457                      OpSize16, AdSize32;
1473                      OpSize16, AdSize16;
1489                      "movabs{w}\t{$src, %ax|ax, $src}", []>, OpSize16, AdSize64;
1505                      "movabs{w}\t{%ax, $dst|$dst, ax}", []>, OpSize16, AdSize64;
1521                     "mov{w}\t{$src, $dst|$dst, $src}", [], IIC_MOV>, OpSize16;
1534                 [(set GR16:$dst, (loadi16 addr:$src))], IIC_MOV_MEM>, OpSize16;
1549                 [(store GR16:$src, addr:$dst)], IIC_MOV_MEM>, OpSize16;
1601                OpSize16, TB;
1622                  >, OpSize16, TB, Requires<[FastBTMem]>;
1641                 IIC_BT_RI>, OpSize16, TB;
1659                  ], IIC_BT_MI>, OpSize16, TB;
1674                 OpSize16, TB;
1685                 OpSize16, TB;
1696                     OpSize16, TB;
1707                     OpSize16, TB;
1718                 OpSize16, TB;
1729                 OpSize16, TB;
1740                     OpSize16, TB;
1751                     OpSize16, TB;
1762                 OpSize16, TB;
1773               OpSize16, TB;
1784                     OpSize16, TB;
1795                     OpSize16, TB;
1828                       itin>, OpSize16;
1855                  OpSize16;
1866                   "xchg{w}\t{$src, %ax|ax, $src}", [], IIC_XCHG_REG>, OpSize16;
1887                  OpSize16;
1900                  OpSize16;
1915                     IIC_CMPXCHG_REG>, TB, OpSize16;
1931                      IIC_CMPXCHG_MEM>, TB, OpSize16;
1979               "lodsw\t{$src, %ax|ax, $src}", [], IIC_LODS>, OpSize16;
1994               "outsw\t{$src, %dx|dx, $src}", [], IIC_OUTS>, OpSize16;
2004              "insw\t{%dx, $dst|$dst, dx}", [], IIC_INS>,  OpSize16;
2063                    "bound\t{$src, $dst|$dst, $src}", [], IIC_BOUND>, OpSize16,
2086                     OpSize16, T8PS;
2100                     OpSize16, T8PS;
2118                     [(set GR16:$dst, EFLAGS, (X86rdrand))]>, OpSize16, TB;
2133                     [(set GR16:$dst, EFLAGS, (X86rdseed))]>, OpSize16, TB;
2149                     OpSize16;
2153                      (implicit EFLAGS)]>, XS, OpSize16;
2181                     OpSize16;
2185                      (implicit EFLAGS)]>, XS, OpSize16;