Lines Matching refs:src2
246 def rr : SI<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
248 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
249 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
250 [(set RC:$dst, (OpNode RC:$src1, RC:$src2))], itins.rr, d>,
253 def rm : SI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
255 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
256 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
257 [(set RC:$dst, (OpNode RC:$src1, (load addr:$src2)))], itins.rm, d>,
267 def rr_Int : SI_Int<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
269 !strconcat(asm, "\t{$src2, $dst|$dst, $src2}"),
270 !strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
273 RC:$src1, RC:$src2))], itins.rr, d>,
275 def rm_Int : SI_Int<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, memopr:$src2),
277 !strconcat(asm, "\t{$src2, $dst|$dst, $src2}"),
278 !strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
281 RC:$src1, mem_cpat:$src2))], itins.rm, d>,
292 def rr : PI<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
294 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
295 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
296 [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))], itins.rr, d>,
299 def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
301 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
302 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
303 [(set RC:$dst, (OpNode RC:$src1, (mem_frag addr:$src2)))],
314 def rr : PI<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
316 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
317 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
320 def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
322 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
323 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
516 (ins VR128:$src1, RC:$src2),
519 (scalar_to_vector RC:$src2))))],
525 (ins VR128:$src1, RC:$src2),
535 "\t{$src2, $src1, $dst|$dst, $src1, $src2}", d>,
545 "\t{$src2, $dst|$dst, $src2}", d>;
625 def : Pat<(v4i32 (X86Movss VR128:$src1, VR128:$src2)),
627 (COPY_TO_REGCLASS (v4i32 VR128:$src2), FR32))>;
628 def : Pat<(v4f32 (X86Movss VR128:$src1, VR128:$src2)),
630 (COPY_TO_REGCLASS (v4f32 VR128:$src2), FR32))>;
633 def : Pat<(v8i32 (X86Movss VR256:$src1, VR256:$src2)),
636 (EXTRACT_SUBREG (v8i32 VR256:$src2), sub_xmm)),
638 def : Pat<(v8f32 (X86Movss VR256:$src1, VR256:$src2)),
641 (EXTRACT_SUBREG (v8f32 VR256:$src2), sub_xmm)),
645 def : Pat<(v2i64 (X86Movsd VR128:$src1, VR128:$src2)),
646 (VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
647 def : Pat<(v2f64 (X86Movsd VR128:$src1, VR128:$src2)),
648 (VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
649 def : Pat<(v4f32 (X86Movsd VR128:$src1, VR128:$src2)),
650 (VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
651 def : Pat<(v4i32 (X86Movsd VR128:$src1, VR128:$src2)),
652 (VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
655 def : Pat<(v4i64 (X86Movsd VR256:$src1, VR256:$src2)),
658 (EXTRACT_SUBREG (v4i64 VR256:$src2), sub_xmm)),
660 def : Pat<(v4f64 (X86Movsd VR256:$src1, VR256:$src2)),
663 (EXTRACT_SUBREG (v4f64 VR256:$src2), sub_xmm)),
670 def : Pat<(v2f64 (X86Movlpd VR128:$src1, VR128:$src2)),
671 (VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
672 def : Pat<(v2i64 (X86Movlpd VR128:$src1, VR128:$src2)),
673 (VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
674 def : Pat<(v4f32 (X86Movlps VR128:$src1, VR128:$src2)),
675 (VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
676 def : Pat<(v4i32 (X86Movlps VR128:$src1, VR128:$src2)),
677 (VMOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
708 def : Pat<(v4i32 (X86Movss VR128:$src1, VR128:$src2)),
709 (MOVSSrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR32))>;
710 def : Pat<(v4f32 (X86Movss VR128:$src1, VR128:$src2)),
711 (MOVSSrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR32))>;
737 def : Pat<(v2i64 (X86Movsd VR128:$src1, VR128:$src2)),
738 (MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
739 def : Pat<(v2f64 (X86Movsd VR128:$src1, VR128:$src2)),
740 (MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
741 def : Pat<(v4f32 (X86Movsd VR128:$src1, VR128:$src2)),
742 (MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
743 def : Pat<(v4i32 (X86Movsd VR128:$src1, VR128:$src2)),
744 (MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
750 def : Pat<(v2f64 (X86Movlpd VR128:$src1, VR128:$src2)),
751 (MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
752 def : Pat<(v2i64 (X86Movlpd VR128:$src1, VR128:$src2)),
753 (MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
754 def : Pat<(v4f32 (X86Movlps VR128:$src1, VR128:$src2)),
755 (MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
756 def : Pat<(v4i32 (X86Movlps VR128:$src1, VR128:$src2)),
757 (MOVSDrr VR128:$src1, (COPY_TO_REGCLASS VR128:$src2, FR64))>;
762 def : InstAlias<"vmovss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
763 (VMOVSSrr_REV VR128L:$dst, VR128:$src1, VR128H:$src2), 0>;
764 def : InstAlias<"vmovsd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
765 (VMOVSDrr_REV VR128L:$dst, VR128:$src1, VR128H:$src2), 0>;
1111 (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2),
1115 (bc_v4f32 (v2f64 (scalar_to_vector (loadf64 addr:$src2))))))],
1120 (outs VR128:$dst), (ins VR128:$src1, f64mem:$src2),
1123 (scalar_to_vector (loadf64 addr:$src2)))))],
1133 "\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1138 "\t{$src2, $dst|$dst, $src2}",
1174 def : Pat<(v4f32 (X86Movlps VR128:$src1, (load addr:$src2))),
1175 (VMOVLPSrm VR128:$src1, addr:$src2)>;
1176 def : Pat<(v4i32 (X86Movlps VR128:$src1, (load addr:$src2))),
1177 (VMOVLPSrm VR128:$src1, addr:$src2)>;
1180 def : Pat<(v2f64 (X86Movlpd VR128:$src1, (load addr:$src2))),
1181 (VMOVLPDrm VR128:$src1, addr:$src2)>;
1182 def : Pat<(v2i64 (X86Movlpd VR128:$src1, (load addr:$src2))),
1183 (VMOVLPDrm VR128:$src1, addr:$src2)>;
1185 (v2f64 (scalar_to_vector (loadf64 addr:$src2))))),
1186 (VMOVLPDrm VR128:$src1, addr:$src2)>;
1189 def : Pat<(store (v4f32 (X86Movlps (load addr:$src1), VR128:$src2)),
1191 (VMOVLPSmr addr:$src1, VR128:$src2)>;
1193 (bc_v4i32 (loadv2i64 addr:$src1)), VR128:$src2)), addr:$src1),
1194 (VMOVLPSmr addr:$src1, VR128:$src2)>;
1195 def : Pat<(store (v2f64 (X86Movlpd (load addr:$src1), VR128:$src2)),
1197 (VMOVLPDmr addr:$src1, VR128:$src2)>;
1198 def : Pat<(store (v2i64 (X86Movlpd (load addr:$src1), VR128:$src2)),
1200 (VMOVLPDmr addr:$src1, VR128:$src2)>;
1205 def : Pat<(store (i64 (extractelt (bc_v2i64 (v4f32 VR128:$src2)),
1207 (MOVLPSmr addr:$src1, VR128:$src2)>;
1210 def : Pat<(v4f32 (X86Movlps VR128:$src1, (load addr:$src2))),
1211 (MOVLPSrm VR128:$src1, addr:$src2)>;
1212 def : Pat<(v4i32 (X86Movlps VR128:$src1, (load addr:$src2))),
1213 (MOVLPSrm VR128:$src1, addr:$src2)>;
1215 (bc_v4f32 (v2i64 (scalar_to_vector (loadi64 addr:$src2))))),
1216 (MOVLPSrm VR128:$src1, addr:$src2)>;
1219 def : Pat<(store (v4f32 (X86Movlps (load addr:$src1), VR128:$src2)),
1221 (MOVLPSmr addr:$src1, VR128:$src2)>;
1223 (bc_v4i32 (loadv2i64 addr:$src1)), VR128:$src2)),
1225 (MOVLPSmr addr:$src1, VR128:$src2)>;
1230 def : Pat<(v2f64 (X86Movlpd VR128:$src1, (load addr:$src2))),
1231 (MOVLPDrm VR128:$src1, addr:$src2)>;
1232 def : Pat<(v2i64 (X86Movlpd VR128:$src1, (load addr:$src2))),
1233 (MOVLPDrm VR128:$src1, addr:$src2)>;
1235 (v2f64 (scalar_to_vector (loadf64 addr:$src2))))),
1236 (MOVLPDrm VR128:$src1, addr:$src2)>;
1239 def : Pat<(store (v2f64 (X86Movlpd (load addr:$src1), VR128:$src2)),
1241 (MOVLPDmr addr:$src1, VR128:$src2)>;
1242 def : Pat<(store (v2i64 (X86Movlpd (load addr:$src1), VR128:$src2)),
1244 (MOVLPDmr addr:$src1, VR128:$src2)>;
1288 (bc_v4f32 (v2i64 (scalar_to_vector (loadi64 addr:$src2))))),
1289 (VMOVHPSrm VR128:$src1, addr:$src2)>;
1291 (bc_v4i32 (v2i64 (X86vzload addr:$src2)))),
1292 (VMOVHPSrm VR128:$src1, addr:$src2)>;
1301 (scalar_to_vector (loadf64 addr:$src2)))),
1302 (VMOVHPDrm VR128:$src1, addr:$src2)>;
1306 (bc_v2f64 (v2i64 (scalar_to_vector (loadi64 addr:$src2)))))),
1307 (VMOVHPDrm VR128:$src1, addr:$src2)>;
1318 (bc_v4f32 (v2i64 (scalar_to_vector (loadi64 addr:$src2))))),
1319 (MOVHPSrm VR128:$src1, addr:$src2)>;
1321 (bc_v4f32 (v2i64 (X86vzload addr:$src2)))),
1322 (MOVHPSrm VR128:$src1, addr:$src2)>;
1333 (scalar_to_vector (loadf64 addr:$src2)))),
1334 (MOVHPDrm VR128:$src1, addr:$src2)>;
1338 (bc_v2f64 (v2i64 (scalar_to_vector (loadi64 addr:$src2)))))),
1339 (MOVHPDrm VR128:$src1, addr:$src2)>;
1353 (ins VR128:$src1, VR128:$src2),
1354 "movlhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1356 (v4f32 (X86Movlhps VR128:$src1, VR128:$src2)))],
1360 (ins VR128:$src1, VR128:$src2),
1361 "movhlps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1363 (v4f32 (X86Movhlps VR128:$src1, VR128:$src2)))],
1369 (ins VR128:$src1, VR128:$src2),
1370 "movlhps\t{$src2, $dst|$dst, $src2}",
1372 (v4f32 (X86Movlhps VR128:$src1, VR128:$src2)))],
1375 (ins VR128:$src1, VR128:$src2),
1376 "movhlps\t{$src2, $dst|$dst, $src2}",
1378 (v4f32 (X86Movhlps VR128:$src1, VR128:$src2)))],
1384 def : Pat<(v4i32 (X86Movlhps VR128:$src1, VR128:$src2)),
1385 (VMOVLHPSrr VR128:$src1, VR128:$src2)>;
1386 def : Pat<(v2i64 (X86Movlhps VR128:$src1, VR128:$src2)),
1387 (VMOVLHPSrr (v2i64 VR128:$src1), VR128:$src2)>;
1390 def : Pat<(v4i32 (X86Movhlps VR128:$src1, VR128:$src2)),
1391 (VMOVHLPSrr VR128:$src1, VR128:$src2)>;
1396 def : Pat<(v4i32 (X86Movlhps VR128:$src1, VR128:$src2)),
1397 (MOVLHPSrr VR128:$src1, VR128:$src2)>;
1398 def : Pat<(v2i64 (X86Movlhps VR128:$src1, VR128:$src2)),
1399 (MOVLHPSrr (v2i64 VR128:$src1), VR128:$src2)>;
1402 def : Pat<(v4i32 (X86Movhlps VR128:$src1, VR128:$src2)),
1403 (MOVHLPSrr VR128:$src1, VR128:$src2)>;
1622 def rr : SI<opc, MRMSrcReg, (outs DstRC:$dst), (ins DstRC:$src1, SrcRC:$src2),
1624 !strconcat(asm, "\t{$src2, $dst|$dst, $src2}"),
1625 !strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
1626 [(set DstRC:$dst, (Int DstRC:$src1, SrcRC:$src2))],
1629 (ins DstRC:$src1, x86memop:$src2),
1631 !strconcat(asm, "\t{$src2, $dst|$dst, $src2}"),
1632 !strconcat(asm, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
1633 [(set DstRC:$dst, (Int DstRC:$src1, (ld_frag addr:$src2)))],
1788 (ins FR64:$src1, FR64:$src2),
1789 "cvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}", [],
1794 (ins FR64:$src1, f64mem:$src2),
1795 "vcvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1817 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1818 "vcvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1820 (int_x86_sse2_cvtsd2ss VR128:$src1, VR128:$src2))],
1824 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
1825 "vcvtsd2ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1827 VR128:$src1, sse_load_f64:$src2))],
1833 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1834 "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
1836 (int_x86_sse2_cvtsd2ss VR128:$src1, VR128:$src2))],
1840 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2),
1841 "cvtsd2ss\t{$src2, $dst|$dst, $src2}",
1843 VR128:$src1, sse_load_f64:$src2))],
1853 (ins FR32:$src1, FR32:$src2),
1854 "vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1860 (ins FR32:$src1, f32mem:$src2),
1861 "vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1902 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1903 "vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1905 (int_x86_sse2_cvtss2sd VR128:$src1, VR128:$src2))],
1909 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2),
1910 "vcvtss2sd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
1912 (int_x86_sse2_cvtss2sd VR128:$src1, sse_load_f32:$src2))],
1917 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
1918 "cvtss2sd\t{$src2, $dst|$dst, $src2}",
1920 (int_x86_sse2_cvtss2sd VR128:$src1, VR128:$src2))],
1924 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2),
1925 "cvtss2sd\t{$src2, $dst|$dst, $src2}",
1927 (int_x86_sse2_cvtss2sd VR128:$src1, sse_load_f32:$src2))],
2295 (outs RC:$dst), (ins RC:$src1, RC:$src2, CC:$cc), asm,
2296 [(set RC:$dst, (OpNode (VT RC:$src1), RC:$src2, immLeaf:$cc))],
2299 (outs RC:$dst), (ins RC:$src1, x86memop:$src2, CC:$cc), asm,
2301 (ld_frag addr:$src2), immLeaf:$cc))],
2308 (ins RC:$src1, RC:$src2, u8imm:$cc), asm_alt, [],
2312 (ins RC:$src1, x86memop:$src2, u8imm:$cc), asm_alt, [],
2319 "cmp${cc}ss\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2320 "cmpss\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2323 "cmp${cc}sd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2324 "cmpsd\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2330 "cmp${cc}ss\t{$src2, $dst|$dst, $src2}",
2331 "cmpss\t{$cc, $src2, $dst|$dst, $src2, $cc}", SSE_ALU_F32S,
2334 "cmp${cc}sd\t{$src2, $dst|$dst, $src2}",
2335 "cmpsd\t{$cc, $src2, $dst|$dst, $src2, $cc}",
2382 def rr: SI<opc, MRMSrcReg, (outs), (ins RC:$src1, RC:$src2),
2383 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
2384 [(set EFLAGS, (OpNode (vt RC:$src1), RC:$src2))],
2387 def rm: SI<opc, MRMSrcMem, (outs), (ins RC:$src1, x86memop:$src2),
2388 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
2390 (ld_frag addr:$src2)))],
2450 (outs RC:$dst), (ins RC:$src1, RC:$src2, CC:$cc), asm,
2451 [(set RC:$dst, (Int RC:$src1, RC:$src2, immLeaf:$cc))],
2455 (outs RC:$dst), (ins RC:$src1, x86memop:$src2, CC:$cc), asm,
2456 [(set RC:$dst, (Int RC:$src1, (ld_frag addr:$src2), immLeaf:$cc))],
2463 (outs RC:$dst), (ins RC:$src1, RC:$src2, u8imm:$cc),
2467 (outs RC:$dst), (ins RC:$src1, x86memop:$src2, u8imm:$cc),
2474 "cmp${cc}ps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2475 "cmpps\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2478 "cmp${cc}pd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2479 "cmppd\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2482 "cmp${cc}ps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2483 "cmpps\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2486 "cmp${cc}pd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2487 "cmppd\t{$cc, $src2, $src1, $dst|$dst, $src1, $src2, $cc}",
2491 "cmp${cc}ps\t{$src2, $dst|$dst, $src2}",
2492 "cmpps\t{$cc, $src2, $dst|$dst, $src2, $cc}",
2495 "cmp${cc}pd\t{$src2, $dst|$dst, $src2}",
2496 "cmppd\t{$cc, $src2, $dst|$dst, $src2, $cc}",
2501 def : Pat<(v4f32 (X86cmpp (v4f32 VR128:$src1), VR128:$src2, imm:$cc)),
2502 (VCMPPSrri (v4f32 VR128:$src1), (v4f32 VR128:$src2), imm:$cc)>;
2503 def : Pat<(v4f32 (X86cmpp (v4f32 VR128:$src1), (loadv4f32 addr:$src2), imm:$cc)),
2504 (VCMPPSrmi (v4f32 VR128:$src1), addr:$src2, imm:$cc)>;
2505 def : Pat<(v2f64 (X86cmpp (v2f64 VR128:$src1), VR128:$src2, imm:$cc)),
2506 (VCMPPDrri VR128:$src1, VR128:$src2, imm:$cc)>;
2507 def : Pat<(v2f64 (X86cmpp (v2f64 VR128:$src1), (loadv2f64 addr:$src2), imm:$cc)),
2508 (VCMPPDrmi VR128:$src1, addr:$src2, imm:$cc)>;
2510 def : Pat<(v8f32 (X86cmpp (v8f32 VR256:$src1), VR256:$src2, imm:$cc)),
2511 (VCMPPSYrri (v8f32 VR256:$src1), (v8f32 VR256:$src2), imm:$cc)>;
2512 def : Pat<(v8f32 (X86cmpp (v8f32 VR256:$src1), (loadv8f32 addr:$src2), imm:$cc)),
2513 (VCMPPSYrmi (v8f32 VR256:$src1), addr:$src2, imm:$cc)>;
2514 def : Pat<(v4f64 (X86cmpp (v4f64 VR256:$src1), VR256:$src2, imm:$cc)),
2515 (VCMPPDYrri VR256:$src1, VR256:$src2, imm:$cc)>;
2516 def : Pat<(v4f64 (X86cmpp (v4f64 VR256:$src1), (loadv4f64 addr:$src2), imm:$cc)),
2517 (VCMPPDYrmi VR256:$src1, addr:$src2, imm:$cc)>;
2521 def : Pat<(v4f32 (X86cmpp (v4f32 VR128:$src1), VR128:$src2, imm:$cc)),
2522 (CMPPSrri (v4f32 VR128:$src1), (v4f32 VR128:$src2), imm:$cc)>;
2523 def : Pat<(v4f32 (X86cmpp (v4f32 VR128:$src1), (memopv4f32 addr:$src2), imm:$cc)),
2524 (CMPPSrmi (v4f32 VR128:$src1), addr:$src2, imm:$cc)>;
2528 def : Pat<(v2f64 (X86cmpp (v2f64 VR128:$src1), VR128:$src2, imm:$cc)),
2529 (CMPPDrri VR128:$src1, VR128:$src2, imm:$cc)>;
2530 def : Pat<(v2f64 (X86cmpp (v2f64 VR128:$src1), (memopv2f64 addr:$src2), imm:$cc)),
2531 (CMPPDrmi VR128:$src1, addr:$src2, imm:$cc)>;
2543 (ins RC:$src1, x86memop:$src2, u8imm:$src3), asm,
2544 [(set RC:$dst, (vt (X86Shufp RC:$src1, (mem_frag addr:$src2),
2548 (ins RC:$src1, RC:$src2, u8imm:$src3), asm,
2549 [(set RC:$dst, (vt (X86Shufp RC:$src1, RC:$src2,
2556 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2559 "shufps\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2562 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2565 "shufpd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
2570 "shufps\t{$src3, $src2, $dst|$dst, $src2, $src3}",
2573 "shufpd\t{$src3, $src2, $dst|$dst, $src2, $src3}",
2579 (bc_v4i32 (loadv2i64 addr:$src2)), (i8 imm:$imm))),
2580 (VSHUFPSrmi VR128:$src1, addr:$src2, imm:$imm)>;
2581 def : Pat<(v4i32 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
2582 (VSHUFPSrri VR128:$src1, VR128:$src2, imm:$imm)>;
2585 (loadv2i64 addr:$src2), (i8 imm:$imm))),
2586 (VSHUFPDrmi VR128:$src1, addr:$src2, imm:$imm)>;
2587 def : Pat<(v2i64 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
2588 (VSHUFPDrri VR128:$src1, VR128:$src2, imm:$imm)>;
2591 def : Pat<(v8i32 (X86Shufp VR256:$src1, VR256:$src2, (i8 imm:$imm))),
2592 (VSHUFPSYrri VR256:$src1, VR256:$src2, imm:$imm)>;
2594 (bc_v8i32 (loadv4i64 addr:$src2)), (i8 imm:$imm))),
2595 (VSHUFPSYrmi VR256:$src1, addr:$src2, imm:$imm)>;
2597 def : Pat<(v4i64 (X86Shufp VR256:$src1, VR256:$src2, (i8 imm:$imm))),
2598 (VSHUFPDYrri VR256:$src1, VR256:$src2, imm:$imm)>;
2600 (loadv4i64 addr:$src2), (i8 imm:$imm))),
2601 (VSHUFPDYrmi VR256:$src1, addr:$src2, imm:$imm)>;
2606 (bc_v4i32 (memopv2i64 addr:$src2)), (i8 imm:$imm))),
2607 (SHUFPSrmi VR128:$src1, addr:$src2, imm:$imm)>;
2608 def : Pat<(v4i32 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
2609 (SHUFPSrri VR128:$src1, VR128:$src2, imm:$imm)>;
2615 (memopv2i64 addr:$src2), (i8 imm:$imm))),
2616 (SHUFPDrmi VR128:$src1, addr:$src2, imm:$imm)>;
2617 def : Pat<(v2i64 (X86Shufp VR128:$src1, VR128:$src2, (i8 imm:$imm))),
2618 (SHUFPDrri VR128:$src1, VR128:$src2, imm:$imm)>;
2631 (outs RC:$dst), (ins RC:$src1, RC:$src2),
2633 (vt (OpNode RC:$src1, RC:$src2)))],
2636 (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
2639 (mem_frag addr:$src2))))],
2646 VR128, f128mem, "unpckhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2649 VR128, f128mem, "unpckhpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2652 VR128, f128mem, "unpcklps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2655 VR128, f128mem, "unpcklpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2659 VR256, f256mem, "unpckhps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2662 VR256, f256mem, "unpckhpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2665 VR256, f256mem, "unpcklps\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2668 VR256, f256mem, "unpcklpd\t{$src2, $src1, $dst|$dst, $src1, $src2}",
2673 VR128, f128mem, "unpckhps\t{$src2, $dst|$dst, $src2}",
2676 VR128, f128mem, "unpckhpd\t{$src2, $dst|$dst, $src2}",
2679 VR128, f128mem, "unpcklps\t{$src2, $dst|$dst, $src2}",
2682 VR128, f128mem, "unpcklpd\t{$src2, $dst|$dst, $src2}",
2687 def : Pat<(v8i32 (X86Unpckl VR256:$src1, (bc_v8i32 (loadv4i64 addr:$src2)))),
2688 (VUNPCKLPSYrm VR256:$src1, addr:$src2)>;
2689 def : Pat<(v8i32 (X86Unpckl VR256:$src1, VR256:$src2)),
2690 (VUNPCKLPSYrr VR256:$src1, VR256:$src2)>;
2691 def : Pat<(v8i32 (X86Unpckh VR256:$src1, (bc_v8i32 (loadv4i64 addr:$src2)))),
2692 (VUNPCKHPSYrm VR256:$src1, addr:$src2)>;
2693 def : Pat<(v8i32 (X86Unpckh VR256:$src1, VR256:$src2)),
2694 (VUNPCKHPSYrr VR256:$src1, VR256:$src2)>;
2696 def : Pat<(v4i64 (X86Unpckl VR256:$src1, (loadv4i64 addr:$src2))),
2697 (VUNPCKLPDYrm VR256:$src1, addr:$src2)>;
2698 def : Pat<(v4i64 (X86Unpckl VR256:$src1, VR256:$src2)),
2699 (VUNPCKLPDYrr VR256:$src1, VR256:$src2)>;
2700 def : Pat<(v4i64 (X86Unpckh VR256:$src1, (loadv4i64 addr:$src2))),
2701 (VUNPCKHPDYrm VR256:$src1, addr:$src2)>;
2702 def : Pat<(v4i64 (X86Unpckh VR256:$src1, VR256:$src2)),
2703 (VUNPCKHPDYrr VR256:$src1, VR256:$src2)>;
2748 (ins RC:$src1, RC:$src2),
2750 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
2751 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
2752 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))], itins.rr>,
2755 (ins RC:$src1, x86memop:$src2),
2757 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
2758 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
2760 (bitconvert (memop_frag addr:$src2)))))],
2883 [(set VR256:$dst, (v4i64 (OpNode VR256:$src1, VR256:$src2)))],
2885 (loadv4i64 addr:$src2)))], 0>, PS, VEX_4V, VEX_L;
2890 (bc_v4i64 (v4f64 VR256:$src2))))],
2892 (loadv4i64 addr:$src2)))], 0>,
2902 (loadv2i64 addr:$src2)))], 0>, PS, VEX_4V;
2907 (bc_v2i64 (v2f64 VR128:$src2))))],
2909 (loadv2i64 addr:$src2)))], 0>,
2916 [(set VR128:$dst, (v2i64 (OpNode VR128:$src1, VR128:$src2)))],
2918 (memopv2i64 addr:$src2)))]>, PS;
2923 (bc_v2i64 (v2f64 VR128:$src2))))],
2925 (memopv2i64 addr:$src2)))]>, PD;
2938 def : Pat<(bc_v8f32 (and VR256:$src1, (loadv4i64 addr:$src2))),
2939 (VANDPSYrm VR256:$src1, addr:$src2)>;
2940 def : Pat<(bc_v8f32 (or VR256:$src1, (loadv4i64 addr:$src2))),
2941 (VORPSYrm VR256:$src1, addr:$src2)>;
2942 def : Pat<(bc_v8f32 (xor VR256:$src1, (loadv4i64 addr:$src2))),
2943 (VXORPSYrm VR256:$src1, addr:$src2)>;
2944 def : Pat<(bc_v8f32 (X86andnp VR256:$src1, (loadv4i64 addr:$src2))),
2945 (VANDNPSYrm VR256:$src1, addr:$src2)>;
3292 def r_Int : I<opc, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
3293 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3296 def m_Int : I<opc, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, vec_memop:$src2),
3297 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3335 def r : I<opc, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
3336 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3339 def m : I<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
3340 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3344 (ins VR128:$src1, VR128:$src2),
3345 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3349 (ins VR128:$src1, vec_memop:$src2),
3350 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
3870 (ins RC:$src1, RC:$src2),
3872 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3873 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3874 [(set RC:$dst, (IntId RC:$src1, RC:$src2))], itins.rr>,
3877 (ins RC:$src1, x86memop:$src2),
3879 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3880 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3881 [(set RC:$dst, (IntId RC:$src1, (bitconvert (memop_frag addr:$src2))))],
3909 // src2 is always 128-bit
3911 (ins RC:$src1, VR128:$src2),
3913 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3914 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3915 [(set RC:$dst, (DstVT (OpNode RC:$src1, (SrcVT VR128:$src2))))],
3918 (ins RC:$src1, i128mem:$src2),
3920 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3921 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3923 (SrcVT (bitconvert (ld_frag addr:$src2))))))], itins.rm>,
3926 (ins RC:$src1, u8imm:$src2),
3928 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3929 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3930 [(set RC:$dst, (DstVT (OpNode2 RC:$src1, (i8 imm:$src2))))], itins.ri>,
3942 (ins RC:$src1, RC:$src2),
3944 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3945 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3946 [(set RC:$dst, (DstVT (OpNode (SrcVT RC:$src1), RC:$src2)))]>,
3949 (ins RC:$src1, x86memop:$src2),
3951 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
3952 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
3954 (bitconvert (memop_frag addr:$src2)))))]>,
4079 (outs VR128:$dst), (ins VR128:$src1, u8imm:$src2),
4080 "vpslldq\t{$src2, $src1, $dst|$dst, $src1, $src2}",
4082 (v16i8 (X86vshldq VR128:$src1, (i8 imm:$src2))))]>,
4085 (outs VR128:$dst), (ins VR128:$src1, u8imm:$src2),
4086 "vpsrldq\t{$src2, $src1, $dst|$dst, $src1, $src2}",
4088 (v16i8 (X86vshrdq VR128:$src1, (i8 imm:$src2))))]>,
4129 (outs VR256:$dst), (ins VR256:$src1, u8imm:$src2),
4130 "vpslldq\t{$src2, $src1, $dst|$dst, $src1, $src2}",
4132 (v32i8 (X86vshldq VR256:$src1, (i8 imm:$src2))))]>,
4135 (outs VR256:$dst), (ins VR256:$src1, u8imm:$src2),
4136 "vpsrldq\t{$src2, $src1, $dst|$dst, $src1, $src2}",
4138 (v32i8 (X86vshrdq VR256:$src1, (i8 imm:$src2))))]>,
4174 (outs VR128:$dst), (ins VR128:$src1, u8imm:$src2),
4175 "pslldq\t{$src2, $dst|$dst, $src2}",
4177 (v16i8 (X86vshldq VR128:$src1, (i8 imm:$src2))))],
4180 (outs VR128:$dst), (ins VR128:$src1, u8imm:$src2),
4181 "psrldq\t{$src2, $dst|$dst, $src2}",
4183 (v16i8 (X86vshrdq VR128:$src1, (i8 imm:$src2))))],
4215 (ins VR128:$src1, u8imm:$src2),
4217 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4219 (vt128 (OpNode VR128:$src1, (i8 imm:$src2))))],
4222 (ins i128mem:$src1, u8imm:$src2),
4224 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4227 (i8 imm:$src2))))], IIC_SSE_PSHUF_MI>, VEX,
4233 (ins VR256:$src1, u8imm:$src2),
4235 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4237 (vt256 (OpNode VR256:$src1, (i8 imm:$src2))))],
4240 (ins i256mem:$src1, u8imm:$src2),
4242 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4245 (i8 imm:$src2))))], IIC_SSE_PSHUF_MI>, VEX, VEX_L,
4251 (outs VR128:$dst), (ins VR128:$src1, u8imm:$src2),
4253 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4255 (vt128 (OpNode VR128:$src1, (i8 imm:$src2))))],
4258 (outs VR128:$dst), (ins i128mem:$src1, u8imm:$src2),
4260 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4263 (i8 imm:$src2))))], IIC_SSE_PSHUF_MI>,
4298 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
4300 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4302 "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4304 (OutVT (OpNode (ArgVT VR128:$src1), VR128:$src2)))]>,
4307 (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2),
4309 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4311 "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4314 (bitconvert (ld_frag addr:$src2)))))]>,
4321 (outs VR256:$dst), (ins VR256:$src1, VR256:$src2),
4323 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4325 (OutVT (OpNode (ArgVT VR256:$src1), VR256:$src2)))]>,
4328 (outs VR256:$dst), (ins VR256:$src1, i256mem:$src2),
4330 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4333 (bitconvert (loadv4i64 addr:$src2)))))]>,
4341 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
4343 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4345 "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4347 (OutVT (OpNode (ArgVT VR128:$src1), VR128:$src2)))]>,
4350 (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2),
4352 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
4354 "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4357 (bitconvert (ld_frag addr:$src2)))))]>,
4364 (outs VR256:$dst), (ins VR256:$src1, VR256:$src2),
4366 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4368 (OutVT (OpNode (ArgVT VR256:$src1), VR256:$src2)))]>,
4371 (outs VR256:$dst), (ins VR256:$src1, i256mem:$src2),
4373 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4376 (bitconvert (loadv4i64 addr:$src2)))))]>,
4426 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
4428 !strconcat(OpcodeStr,"\t{$src2, $dst|$dst, $src2}"),
4429 !strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4430 [(set VR128:$dst, (vt (OpNode VR128:$src1, VR128:$src2)))],
4433 (outs VR128:$dst), (ins VR128:$src1, i128mem:$src2),
4435 !strconcat(OpcodeStr,"\t{$src2, $dst|$dst, $src2}"),
4436 !strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
4438 (bitconvert (ld_frag addr:$src2)))))],
4446 (outs VR256:$dst), (ins VR256:$src1, VR256:$src2),
4447 !strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4448 [(set VR256:$dst, (vt (OpNode VR256:$src1, VR256:$src2)))]>,
4451 (outs VR256:$dst), (ins VR256:$src1, i256mem:$src2),
4452 !strconcat(OpcodeStr,"\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
4454 (bitconvert (loadv4i64 addr:$src2)))))]>,
4530 GR32orGR64:$src2, u8imm:$src3),
4532 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
4533 "vpinsrw\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
4535 (X86pinsrw VR128:$src1, GR32orGR64:$src2, imm:$src3))],
4539 i16mem:$src2, u8imm:$src3),
4541 "pinsrw\t{$src3, $src2, $dst|$dst, $src2, $src3}",
4542 "vpinsrw\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
4544 (X86pinsrw VR128:$src1, (extloadi16 addr:$src2),
4552 (outs GR32orGR64:$dst), (ins VR128:$src1, u8imm:$src2),
4553 "vpextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
4555 imm:$src2))]>, PD, VEX,
4558 (outs GR32orGR64:$dst), (ins VR128:$src1, u8imm:$src2),
4559 "pextrw\t{$src2, $src1, $dst|$dst, $src1, $src2}",
4561 imm:$src2))], IIC_SSE_PEXTRW>,
4740 def : Pat<(v8i32 (X86Vinsert (v8i32 immAllZerosV), GR32:$src2, (iPTR 0))),
4741 (SUBREG_TO_REG (i32 0), (VMOVDI2PDIrr GR32:$src2), sub_xmm)>;
4743 def : Pat<(v4i64 (X86Vinsert (bc_v4i64 (v8i32 immAllZerosV)), GR64:$src2, (iPTR 0))),
4744 (SUBREG_TO_REG (i32 0), (VMOV64toPQIrr GR64:$src2), sub_xmm)>;
4746 def : Pat<(v8i32 (X86Vinsert undef, GR32:$src2, (iPTR 0))),
4747 (SUBREG_TO_REG (i32 0), (VMOVDI2PDIrr GR32:$src2), sub_xmm)>;
4749 def : Pat<(v4i64 (X86Vinsert undef, GR64:$src2, (iPTR 0))),
4750 (SUBREG_TO_REG (i32 0), (VMOV64toPQIrr GR64:$src2), sub_xmm)>;
5202 (outs RC:$dst), (ins RC:$src1, RC:$src2),
5204 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5205 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5206 [(set RC:$dst, (Int RC:$src1, RC:$src2))], itins.rr>,
5209 (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
5211 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5212 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5213 [(set RC:$dst, (Int RC:$src1, (ld_frag addr:$src2)))], itins.rr>,
5280 def rr : S3DI<o, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
5282 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5283 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5284 [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))], IIC_SSE_HADDSUB_RR>,
5287 def rm : S3DI<o, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
5289 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5290 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5291 [(set RC:$dst, (vt (OpNode RC:$src1, (ld_frag addr:$src2))))],
5297 def rr : S3I<o, MRMSrcReg, (outs RC:$dst), (ins RC:$src1, RC:$src2),
5299 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5300 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5301 [(set RC:$dst, (vt (OpNode RC:$src1, RC:$src2)))], IIC_SSE_HADDSUB_RR>,
5304 def rm : S3I<o, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2),
5306 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5307 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5308 [(set RC:$dst, (vt (OpNode RC:$src1, (ld_frag addr:$src2))))],
5499 (ins RC:$src1, RC:$src2),
5501 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5502 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5503 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))], itins.rr>,
5506 (ins RC:$src1, x86memop:$src2),
5508 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5509 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5512 (bitconvert (memop_frag addr:$src2)))))], itins.rm>,
5522 (ins VR128:$src1, VR128:$src2),
5524 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5525 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5526 [(set VR128:$dst, (IntId128 VR128:$src1, VR128:$src2))]>,
5529 (ins VR128:$src1, i128mem:$src2),
5531 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
5532 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
5535 (bitconvert (ld_frag addr:$src2))))]>,
5544 (ins VR256:$src1, VR256:$src2),
5545 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5546 [(set VR256:$dst, (IntId256 VR256:$src1, VR256:$src2))]>,
5549 (ins VR256:$src1, i256mem:$src2),
5550 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
5552 (IntId256 VR256:$src1, (bitconvert (loadv4i64 addr:$src2))))]>,
5676 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
5678 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5680 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5684 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
5686 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
5688 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
5696 (ins VR256:$src1, VR256:$src2, u8imm:$src3),
5698 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5702 (ins VR256:$src1, i256mem:$src2, u8imm:$src3),
5704 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
5717 def : Pat<(v8i32 (X86PAlignr VR256:$src1, VR256:$src2, (i8 imm:$imm))),
5718 (VPALIGNRYrri VR256:$src1, VR256:$src2, imm:$imm)>;
5719 def : Pat<(v8f32 (X86PAlignr VR256:$src1, VR256:$src2, (i8 imm:$imm))),
5720 (VPALIGNRYrri VR256:$src1, VR256:$src2, imm:$imm)>;
5721 def : Pat<(v16i16 (X86PAlignr VR256:$src1, VR256:$src2, (i8 imm:$imm))),
5722 (VPALIGNRYrri VR256:$src1, VR256:$src2, imm:$imm)>;
5723 def : Pat<(v32i8 (X86PAlignr VR256:$src1, VR256:$src2, (i8 imm:$imm))),
5724 (VPALIGNRYrri VR256:$src1, VR256:$src2, imm:$imm)>;
5728 def : Pat<(v4i32 (X86PAlignr VR128:$src1, VR128:$src2, (i8 imm:$imm))),
5729 (VPALIGNRrri VR128:$src1, VR128:$src2, imm:$imm)>;
5730 def : Pat<(v4f32 (X86PAlignr VR128:$src1, VR128:$src2, (i8 imm:$imm))),
5731 (VPALIGNRrri VR128:$src1, VR128:$src2, imm:$imm)>;
5732 def : Pat<(v8i16 (X86PAlignr VR128:$src1, VR128:$src2, (i8 imm:$imm))),
5733 (VPALIGNRrri VR128:$src1, VR128:$src2, imm:$imm)>;
5734 def : Pat<(v16i8 (X86PAlignr VR128:$src1, VR128:$src2, (i8 imm:$imm))),
5735 (VPALIGNRrri VR128:$src1, VR128:$src2, imm:$imm)>;
5739 def : Pat<(v4i32 (X86PAlignr VR128:$src1, VR128:$src2, (i8 imm:$imm))),
5740 (PALIGNRrri VR128:$src1, VR128:$src2, imm:$imm)>;
5741 def : Pat<(v4f32 (X86PAlignr VR128:$src1, VR128:$src2, (i8 imm:$imm))),
5742 (PALIGNRrri VR128:$src1, VR128:$src2, imm:$imm)>;
5743 def : Pat<(v8i16 (X86PAlignr VR128:$src1, VR128:$src2, (i8 imm:$imm))),
5744 (PALIGNRrri VR128:$src1, VR128:$src2, imm:$imm)>;
5745 def : Pat<(v16i8 (X86PAlignr VR128:$src1, VR128:$src2, (i8 imm:$imm))),
5746 (PALIGNRrri VR128:$src1, VR128:$src2, imm:$imm)>;
5755 def MONITOR : PseudoI<(outs), (ins i32mem:$src1, GR32:$src2, GR32:$src3),
5756 [(int_x86_sse3_monitor addr:$src1, GR32:$src2, GR32:$src3)]>,
6055 (ins VR128:$src1, u8imm:$src2),
6057 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6059 imm:$src2))]>,
6064 (ins i8mem:$dst, VR128:$src1, u8imm:$src2),
6066 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6068 imm:$src2)))), addr:$dst)]>;
6081 (ins VR128:$src1, u8imm:$src2),
6083 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6089 (ins i16mem:$dst, VR128:$src1, u8imm:$src2),
6091 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6093 imm:$src2)))), addr:$dst)]>;
6105 (ins VR128:$src1, u8imm:$src2),
6107 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6109 (extractelt (v4i32 VR128:$src1), imm:$src2))]>,
6113 (ins i32mem:$dst, VR128:$src1, u8imm:$src2),
6115 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6116 [(store (extractelt (v4i32 VR128:$src1), imm:$src2),
6128 (ins VR128:$src1, u8imm:$src2),
6130 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6132 (extractelt (v2i64 VR128:$src1), imm:$src2))]>,
6136 (ins i64mem:$dst, VR128:$src1, u8imm:$src2),
6138 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6139 [(store (extractelt (v2i64 VR128:$src1), imm:$src2),
6153 (ins VR128:$src1, u8imm:$src2),
6155 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6157 (extractelt (bc_v4i32 (v4f32 VR128:$src1)), imm:$src2))],
6161 (ins f32mem:$dst, VR128:$src1, u8imm:$src2),
6163 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6164 [(store (extractelt (bc_v4i32 (v4f32 VR128:$src1)), imm:$src2),
6176 imm:$src2))),
6178 (VEXTRACTPSmr addr:$dst, VR128:$src1, imm:$src2)>,
6181 imm:$src2))),
6183 (EXTRACTPSmr addr:$dst, VR128:$src1, imm:$src2)>,
6192 (ins VR128:$src1, GR32orGR64:$src2, u8imm:$src3),
6194 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6196 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6198 (X86pinsrb VR128:$src1, GR32orGR64:$src2, imm:$src3))]>,
6201 (ins VR128:$src1, i8mem:$src2, u8imm:$src3),
6203 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6205 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6207 (X86pinsrb VR128:$src1, (extloadi8 addr:$src2),
6218 (ins VR128:$src1, GR32:$src2, u8imm:$src3),
6220 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6222 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6224 (v4i32 (insertelt VR128:$src1, GR32:$src2, imm:$src3)))]>,
6227 (ins VR128:$src1, i32mem:$src2, u8imm:$src3),
6229 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6231 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6233 (v4i32 (insertelt VR128:$src1, (loadi32 addr:$src2),
6244 (ins VR128:$src1, GR64:$src2, u8imm:$src3),
6246 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6248 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6250 (v2i64 (insertelt VR128:$src1, GR64:$src2, imm:$src3)))]>,
6253 (ins VR128:$src1, i64mem:$src2, u8imm:$src3),
6255 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6257 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6259 (v2i64 (insertelt VR128:$src1, (loadi64 addr:$src2),
6275 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
6277 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6279 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6281 (X86insertps VR128:$src1, VR128:$src2, imm:$src3))], itins.rr>,
6284 (ins VR128:$src1, f32mem:$src2, u8imm:$src3),
6286 !strconcat(asm, "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6288 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6291 (v4f32 (scalar_to_vector (loadf32 addr:$src2))),
6307 (scalar_to_vector (loadf32 addr:$src2))), (i8 0)),
6309 (INSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
6311 (loadv4f32 addr:$src2), (i8 0)), imm:$src3)),
6312 (INSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
6319 (X86VBroadcast (loadf32 addr:$src2)), imm:$src3)),
6320 (VINSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
6322 (X86VBroadcast (loadv4f32 addr:$src2)), imm:$src3)),
6323 (VINSERTPSrm VR128:$src1, addr:$src2, imm:$src3)>;
6338 (outs RC:$dst), (ins RC:$src1, i32u8imm:$src2),
6340 "ps\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6341 [(set RC:$dst, (V4F32Int RC:$src1, imm:$src2))],
6346 (outs RC:$dst), (ins x86memop:$src1, i32u8imm:$src2),
6348 "ps\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6350 (V4F32Int (mem_frag32 addr:$src1),imm:$src2))],
6357 (outs RC:$dst), (ins RC:$src1, i32u8imm:$src2),
6359 "pd\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6360 [(set RC:$dst, (V2F64Int RC:$src1, imm:$src2))],
6365 (outs RC:$dst), (ins x86memop:$src1, i32u8imm:$src2),
6367 "pd\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
6369 (V2F64Int (mem_frag64 addr:$src1),imm:$src2))],
6382 (outs FR32:$dst), (ins FR32:$src1, FR32:$src2, i32u8imm:$src3),
6385 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6387 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6393 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32u8imm:$src3),
6396 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6398 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6399 [(set VR128:$dst, (F32Int VR128:$src1, VR128:$src2, imm:$src3))]>,
6404 (outs VR128:$dst), (ins VR128:$src1, ssmem:$src2, i32u8imm:$src3),
6407 "ss\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6409 "ss\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6411 (F32Int VR128:$src1, sse_load_f32:$src2, imm:$src3))]>,
6417 (outs FR64:$dst), (ins FR64:$src1, FR64:$src2, i32u8imm:$src3),
6420 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6422 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6428 (outs VR128:$dst), (ins VR128:$src1, VR128:$src2, i32u8imm:$src3),
6431 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6433 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6434 [(set VR128:$dst, (F64Int VR128:$src1, VR128:$src2, imm:$src3))]>,
6439 (outs VR128:$dst), (ins VR128:$src1, sdmem:$src2, i32u8imm:$src3),
6442 "sd\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6444 "sd\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6446 (F64Int VR128:$src1, sse_load_f64:$src2, imm:$src3))]>,
6595 def VPTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
6596 "vptest\t{$src2, $src1|$src1, $src2}",
6597 [(set EFLAGS, (X86ptest VR128:$src1, (v2i64 VR128:$src2)))]>,
6599 def VPTESTrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
6600 "vptest\t{$src2, $src1|$src1, $src2}",
6601 [(set EFLAGS,(X86ptest VR128:$src1, (loadv2i64 addr:$src2)))]>,
6604 def VPTESTYrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR256:$src1, VR256:$src2),
6605 "vptest\t{$src2, $src1|$src1, $src2}",
6606 [(set EFLAGS, (X86ptest VR256:$src1, (v4i64 VR256:$src2)))]>,
6608 def VPTESTYrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR256:$src1, i256mem:$src2),
6609 "vptest\t{$src2, $src1|$src1, $src2}",
6610 [(set EFLAGS,(X86ptest VR256:$src1, (loadv4i64 addr:$src2)))]>,
6615 def PTESTrr : SS48I<0x17, MRMSrcReg, (outs), (ins VR128:$src1, VR128:$src2),
6616 "ptest\t{$src2, $src1|$src1, $src2}",
6617 [(set EFLAGS, (X86ptest VR128:$src1, (v2i64 VR128:$src2)))]>,
6619 def PTESTrm : SS48I<0x17, MRMSrcMem, (outs), (ins VR128:$src1, f128mem:$src2),
6620 "ptest\t{$src2, $src1|$src1, $src2}",
6621 [(set EFLAGS, (X86ptest VR128:$src1, (memopv2i64 addr:$src2)))]>,
6628 def rr : SS48I<opc, MRMSrcReg, (outs), (ins RC:$src1, RC:$src2),
6629 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
6630 [(set EFLAGS, (X86testp RC:$src1, (vt RC:$src2)))]>,
6632 def rm : SS48I<opc, MRMSrcMem, (outs), (ins RC:$src1, x86memop:$src2),
6633 !strconcat(OpcodeStr, "\t{$src2, $src1|$src1, $src2}"),
6634 [(set EFLAGS, (X86testp RC:$src1, (mem_frag addr:$src2)))]>,
6726 (ins RC:$src1, RC:$src2),
6728 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
6729 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
6730 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>,
6733 (ins RC:$src1, x86memop:$src2),
6735 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
6736 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
6738 (OpVT (OpNode RC:$src1, (bitconvert (memop_frag addr:$src2)))))]>,
6751 (ins RC:$src1, RC:$src2),
6753 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
6754 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
6755 [(set RC:$dst, (DstVT (OpNode (SrcVT RC:$src1), RC:$src2)))]>,
6758 (ins RC:$src1, x86memop:$src2),
6760 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
6761 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
6763 (bitconvert (memop_frag addr:$src2)))))]>,
6884 (ins RC:$src1, RC:$src2, u8imm:$src3),
6887 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6889 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6890 [(set RC:$dst, (IntId RC:$src1, RC:$src2, imm:$src3))], itins.rr>,
6893 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
6896 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6898 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6901 (bitconvert (memop_frag addr:$src2)), imm:$src3))], itins.rm>,
6912 (ins RC:$src1, RC:$src2, u8imm:$src3),
6915 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6917 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6918 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, imm:$src3)))],
6921 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
6924 "\t{$src3, $src2, $dst|$dst, $src2, $src3}"),
6926 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}")),
6929 (bitconvert (memop_frag addr:$src2)), imm:$src3)))], itins.rm>,
7018 (ins RC:$src1, RC:$src2, RC:$src3),
7020 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
7021 [(set RC:$dst, (IntId RC:$src1, RC:$src2, RC:$src3))],
7026 (ins RC:$src1, x86memop:$src2, RC:$src3),
7028 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
7030 (IntId RC:$src1, (bitconvert (mem_frag addr:$src2)),
7066 (v16i8 VR128:$src2))),
7067 (VPBLENDVBrr VR128:$src2, VR128:$src1, VR128:$mask)>;
7069 (v4i32 VR128:$src2))),
7070 (VBLENDVPSrr VR128:$src2, VR128:$src1, VR128:$mask)>;
7072 (v4f32 VR128:$src2))),
7073 (VBLENDVPSrr VR128:$src2, VR128:$src1, VR128:$mask)>;
7075 (v2i64 VR128:$src2))),
7076 (VBLENDVPDrr VR128:$src2, VR128:$src1, VR128:$mask)>;
7078 (v2f64 VR128:$src2))),
7079 (VBLENDVPDrr VR128:$src2, VR128:$src1, VR128:$mask)>;
7081 (v8i32 VR256:$src2))),
7082 (VBLENDVPSYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
7084 (v8f32 VR256:$src2))),
7085 (VBLENDVPSYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
7087 (v4i64 VR256:$src2))),
7088 (VBLENDVPDYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
7090 (v4f64 VR256:$src2))),
7091 (VBLENDVPDYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
7096 (v32i8 VR256:$src2))),
7097 (VPBLENDVBYrr VR256:$src2, VR256:$src1, VR256:$mask)>;
7166 (ins VR128:$src1, VR128:$src2),
7168 "\t{$src2, $dst|$dst, $src2}"),
7169 [(set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0))],
7173 (ins VR128:$src1, x86memop:$src2),
7175 "\t{$src2, $dst|$dst, $src2}"),
7178 (bitconvert (mem_frag addr:$src2)), XMM0))],
7196 def : InstAlias<"blendvpd\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}",
7197 (BLENDVPDrr0 VR128:$dst, VR128:$src2)>;
7198 def : InstAlias<"blendvpd\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}",
7199 (BLENDVPDrm0 VR128:$dst, f128mem:$src2)>;
7200 def : InstAlias<"blendvps\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}",
7201 (BLENDVPSrr0 VR128:$dst, VR128:$src2)>;
7202 def : InstAlias<"blendvps\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}",
7203 (BLENDVPSrm0 VR128:$dst, f128mem:$src2)>;
7204 def : InstAlias<"pblendvb\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}",
7205 (PBLENDVBrr0 VR128:$dst, VR128:$src2)>;
7206 def : InstAlias<"pblendvb\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}",
7207 (PBLENDVBrm0 VR128:$dst, i128mem:$src2)>;
7211 (v16i8 VR128:$src2))),
7212 (PBLENDVBrr0 VR128:$src2, VR128:$src1)>;
7214 (v4i32 VR128:$src2))),
7215 (BLENDVPSrr0 VR128:$src2, VR128:$src1)>;
7217 (v4f32 VR128:$src2))),
7218 (BLENDVPSrr0 VR128:$src2, VR128:$src1)>;
7220 (v2i64 VR128:$src2))),
7221 (BLENDVPDrr0 VR128:$src2, VR128:$src1)>;
7223 (v2f64 VR128:$src2))),
7224 (BLENDVPDrr0 VR128:$src2, VR128:$src1)>;
7282 (ins RC:$src1, RC:$src2),
7284 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
7285 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
7286 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2)))]>;
7288 (ins RC:$src1, x86memop:$src2),
7290 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
7291 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
7293 (OpVT (OpNode RC:$src1, (memop_frag addr:$src2))))]>;
7315 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
7316 [(set VR128:$dst, (int_x86_sse42_pcmpistrm128 VR128:$src1, VR128:$src2,
7319 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
7321 (bc_v16i8 (ld_frag addr:$src2)), imm:$src3))]>;
7333 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
7334 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
7338 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
7339 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
7389 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
7391 (X86pcmpistri VR128:$src1, VR128:$src2, imm:$src3))]>;
7393 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
7395 (bc_v16i8 (ld_frag addr:$src2)), imm:$src3))]>;
7407 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
7408 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
7412 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
7413 !strconcat(asm, "\t{$src3, $src2, $src1|$src1, $src2, $src3}"),
7472 SS42FI<opc, MRMSrcReg, (outs RCOut:$dst), (ins RCOut:$src1, RCIn:$src2),
7473 !strconcat(asm, "\t{$src2, $src1|$src1, $src2}"),
7474 [(set RCOut:$dst, (Int RCOut:$src1, RCIn:$src2))], IIC_CRC32_REG>,
7479 SS42FI<opc, MRMSrcMem, (outs RCOut:$dst), (ins RCOut:$src1, x86memop:$src2),
7480 !strconcat(asm, "\t{$src2, $src1|$src1, $src2}"),
7481 [(set RCOut:$dst, (Int RCOut:$src1, (load addr:$src2)))],
7517 (ins VR128:$src1, VR128:$src2),
7518 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
7520 (set VR128:$dst, (IntId VR128:$src1, VR128:$src2, XMM0)),
7521 (set VR128:$dst, (IntId VR128:$src1, VR128:$src2)))]>, T8;
7524 (ins VR128:$src1, i128mem:$src2),
7525 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
7528 (bc_v4i32 (memopv2i64 addr:$src2)), XMM0)),
7530 (bc_v4i32 (memopv2i64 addr:$src2)))))]>, T8;
7535 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
7536 "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
7538 (int_x86_sha1rnds4 VR128:$src1, VR128:$src2,
7541 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
7542 "sha1rnds4\t{$src3, $src2, $dst|$dst, $src2, $src3}",
7545 (bc_v4i32 (memopv2i64 addr:$src2)),
7560 def : InstAlias<"sha256rnds2\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}",
7561 (SHA256RNDS2rr VR128:$dst, VR128:$src2)>;
7562 def : InstAlias<"sha256rnds2\t{%xmm0, $src2, $dst|$dst, $src2, xmm0}",
7563 (SHA256RNDS2rm VR128:$dst, i128mem:$src2)>;
7572 (ins VR128:$src1, VR128:$src2),
7574 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
7575 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
7576 [(set VR128:$dst, (IntId128 VR128:$src1, VR128:$src2))]>,
7579 (ins VR128:$src1, i128mem:$src2),
7581 !strconcat(OpcodeStr, "\t{$src2, $dst|$dst, $src2}"),
7582 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}")),
7584 (IntId128 VR128:$src1, (ld_frag addr:$src2)))]>,
7639 (ins VR128:$src1, u8imm:$src2),
7640 "vaeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7642 (int_x86_aesni_aeskeygenassist VR128:$src1, imm:$src2))]>,
7645 (ins i128mem:$src1, u8imm:$src2),
7646 "vaeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7648 (int_x86_aesni_aeskeygenassist (loadv2i64 addr:$src1), imm:$src2))]>,
7652 (ins VR128:$src1, u8imm:$src2),
7653 "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7655 (int_x86_aesni_aeskeygenassist VR128:$src1, imm:$src2))]>,
7658 (ins i128mem:$src1, u8imm:$src2),
7659 "aeskeygenassist\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7661 (int_x86_aesni_aeskeygenassist (memopv2i64 addr:$src1), imm:$src2))]>,
7671 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
7672 "vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7674 (int_x86_pclmulqdq VR128:$src1, VR128:$src2, imm:$src3))]>,
7678 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
7679 "vpclmulqdq\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7681 (loadv2i64 addr:$src2), imm:$src3))]>,
7688 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
7689 "pclmulqdq\t{$src3, $src2, $dst|$dst, $src2, $src3}",
7691 (int_x86_pclmulqdq VR128:$src1, VR128:$src2, imm:$src3))],
7695 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
7696 "pclmulqdq\t{$src3, $src2, $dst|$dst, $src2, $src3}",
7698 (memopv2i64 addr:$src2), imm:$src3))],
7712 "dq {$src2, $src1, $dst|$dst, $src1, $src2}"),
7713 (VPCLMULQDQrr VR128:$dst, VR128:$src1, VR128:$src2, immop),
7717 "dq {$src2, $src1, $dst|$dst, $src1, $src2}"),
7718 (VPCLMULQDQrm VR128:$dst, VR128:$src1, i128mem:$src2, immop),
7745 (ins VR128:$src, VR128:$src2, u8imm:$len, u8imm:$idx),
7746 "insertq\t{$idx, $len, $src2, $src|$src, $src2, $len, $idx}",
7747 [(set VR128:$dst, (X86insertqi VR128:$src, VR128:$src2,
7843 (ins VR256:$src1, VR128:$src2, u8imm:$src3),
7844 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7848 (ins VR256:$src1, f128mem:$src2, u8imm:$src3),
7849 "vinsertf128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
7854 def : Pat<(vinsert128_insert:$ins (v8f32 VR256:$src1), (v4f32 VR128:$src2),
7856 (VINSERTF128rr VR256:$src1, VR128:$src2,
7858 def : Pat<(vinsert128_insert:$ins (v4f64 VR256:$src1), (v2f64 VR128:$src2),
7860 (VINSERTF128rr VR256:$src1, VR128:$src2,
7863 def : Pat<(vinsert128_insert:$ins (v8f32 VR256:$src1), (loadv4f32 addr:$src2),
7865 (VINSERTF128rm VR256:$src1, addr:$src2,
7867 def : Pat<(vinsert128_insert:$ins (v4f64 VR256:$src1), (loadv2f64 addr:$src2),
7869 (VINSERTF128rm VR256:$src1, addr:$src2,
7874 def : Pat<(vinsert128_insert:$ins (v4i64 VR256:$src1), (v2i64 VR128:$src2),
7876 (VINSERTF128rr VR256:$src1, VR128:$src2,
7878 def : Pat<(vinsert128_insert:$ins (v8i32 VR256:$src1), (v4i32 VR128:$src2),
7880 (VINSERTF128rr VR256:$src1, VR128:$src2,
7882 def : Pat<(vinsert128_insert:$ins (v32i8 VR256:$src1), (v16i8 VR128:$src2),
7884 (VINSERTF128rr VR256:$src1, VR128:$src2,
7886 def : Pat<(vinsert128_insert:$ins (v16i16 VR256:$src1), (v8i16 VR128:$src2),
7888 (VINSERTF128rr VR256:$src1, VR128:$src2,
7891 def : Pat<(vinsert128_insert:$ins (v4i64 VR256:$src1), (loadv2i64 addr:$src2),
7893 (VINSERTF128rm VR256:$src1, addr:$src2,
7896 (bc_v4i32 (loadv2i64 addr:$src2)),
7898 (VINSERTF128rm VR256:$src1, addr:$src2,
7901 (bc_v16i8 (loadv2i64 addr:$src2)),
7903 (VINSERTF128rm VR256:$src1, addr:$src2,
7906 (bc_v8i16 (loadv2i64 addr:$src2)),
7908 (VINSERTF128rm VR256:$src1, addr:$src2,
7917 (ins VR256:$src1, u8imm:$src2),
7918 "vextractf128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7922 (ins f128mem:$dst, VR256:$src1, u8imm:$src2),
7923 "vextractf128\t{$src2, $src1, $dst|$dst, $src1, $src2}",
7991 (ins VR128:$src1, f128mem:$src2),
7992 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7993 [(set VR128:$dst, (IntLd addr:$src2, VR128:$src1))]>,
7996 (ins VR256:$src1, f256mem:$src2),
7997 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
7998 [(set VR256:$dst, (IntLd256 addr:$src2, VR256:$src1))]>,
8001 (ins f128mem:$dst, VR128:$src1, VR128:$src2),
8002 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8003 [(IntSt addr:$dst, VR128:$src1, VR128:$src2)]>, VEX_4V;
8005 (ins f256mem:$dst, VR256:$src1, VR256:$src2),
8006 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8007 [(IntSt256 addr:$dst, VR256:$src1, VR256:$src2)]>, VEX_4V, VEX_L;
8032 (ins RC:$src1, RC:$src2),
8033 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8034 [(set RC:$dst, (f_vt (X86VPermilpv RC:$src1, (i_vt RC:$src2))))]>, VEX_4V,
8037 (ins RC:$src1, x86memop_i:$src2),
8038 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8040 (i_vt (bitconvert (i_frag addr:$src2))))))]>, VEX_4V,
8044 (ins RC:$src1, u8imm:$src2),
8045 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8046 [(set RC:$dst, (f_vt (X86VPermilpi RC:$src1, (i8 imm:$src2))))]>, VEX,
8049 (ins x86memop_f:$src1, u8imm:$src2),
8050 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8052 (f_vt (X86VPermilpi (load addr:$src1), (i8 imm:$src2))))]>, VEX,
8071 def : Pat<(v8f32 (X86VPermilpv VR256:$src1, (v8i32 VR256:$src2))),
8072 (VPERMILPSYrr VR256:$src1, VR256:$src2)>;
8073 def : Pat<(v8f32 (X86VPermilpv VR256:$src1, (bc_v8i32 (loadv4i64 addr:$src2)))),
8074 (VPERMILPSYrm VR256:$src1, addr:$src2)>;
8075 def : Pat<(v4f64 (X86VPermilpv VR256:$src1, (v4i64 VR256:$src2))),
8076 (VPERMILPDYrr VR256:$src1, VR256:$src2)>;
8077 def : Pat<(v4f64 (X86VPermilpv VR256:$src1, (loadv4i64 addr:$src2))),
8078 (VPERMILPDYrm VR256:$src1, addr:$src2)>;
8090 def : Pat<(v4f32 (X86VPermilpv VR128:$src1, (v4i32 VR128:$src2))),
8091 (VPERMILPSrr VR128:$src1, VR128:$src2)>;
8092 def : Pat<(v4f32 (X86VPermilpv VR128:$src1, (bc_v4i32 (loadv2i64 addr:$src2)))),
8093 (VPERMILPSrm VR128:$src1, addr:$src2)>;
8094 def : Pat<(v2f64 (X86VPermilpv VR128:$src1, (v2i64 VR128:$src2))),
8095 (VPERMILPDrr VR128:$src1, VR128:$src2)>;
8096 def : Pat<(v2f64 (X86VPermilpv VR128:$src1, (loadv2i64 addr:$src2))),
8097 (VPERMILPDrm VR128:$src1, addr:$src2)>;
8111 (ins VR256:$src1, VR256:$src2, u8imm:$src3),
8112 "vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8113 [(set VR256:$dst, (v8f32 (X86VPerm2x128 VR256:$src1, VR256:$src2,
8117 (ins VR256:$src1, f256mem:$src2, u8imm:$src3),
8118 "vperm2f128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8119 [(set VR256:$dst, (X86VPerm2x128 VR256:$src1, (loadv8f32 addr:$src2),
8125 def : Pat<(v4f64 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8126 (VPERM2F128rr VR256:$src1, VR256:$src2, imm:$imm)>;
8128 (loadv4f64 addr:$src2), (i8 imm:$imm))),
8129 (VPERM2F128rm VR256:$src1, addr:$src2, imm:$imm)>;
8133 def : Pat<(v8i32 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8134 (VPERM2F128rr VR256:$src1, VR256:$src2, imm:$imm)>;
8135 def : Pat<(v4i64 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8136 (VPERM2F128rr VR256:$src1, VR256:$src2, imm:$imm)>;
8137 def : Pat<(v32i8 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8138 (VPERM2F128rr VR256:$src1, VR256:$src2, imm:$imm)>;
8139 def : Pat<(v16i16 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8140 (VPERM2F128rr VR256:$src1, VR256:$src2, imm:$imm)>;
8143 (bc_v8i32 (loadv4i64 addr:$src2)), (i8 imm:$imm))),
8144 (VPERM2F128rm VR256:$src1, addr:$src2, imm:$imm)>;
8146 (loadv4i64 addr:$src2), (i8 imm:$imm))),
8147 (VPERM2F128rm VR256:$src1, addr:$src2, imm:$imm)>;
8149 (bc_v32i8 (loadv4i64 addr:$src2)), (i8 imm:$imm))),
8150 (VPERM2F128rm VR256:$src1, addr:$src2, imm:$imm)>;
8152 (bc_v16i16 (loadv4i64 addr:$src2)), (i8 imm:$imm))),
8153 (VPERM2F128rm VR256:$src1, addr:$src2, imm:$imm)>;
8186 (ins RC:$src1, i32u8imm:$src2),
8187 "vcvtps2ph\t{$src2, $src1, $dst|$dst, $src1, $src2}",
8188 [(set VR128:$dst, (Int RC:$src1, imm:$src2))]>,
8193 (ins x86memop:$dst, RC:$src1, i32u8imm:$src2),
8194 "vcvtps2ph\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
8214 (int_x86_vcvtps2ph_128 VR128:$src1, i32:$src2))), (iPTR 0))),
8216 (VCVTPS2PHmr addr:$dst, VR128:$src1, imm:$src2)>;
8218 (int_x86_vcvtps2ph_128 VR128:$src1, i32:$src2))), (iPTR 0))),
8220 (VCVTPS2PHmr addr:$dst, VR128:$src1, imm:$src2)>;
8221 def : Pat<(store (v8i16 (int_x86_vcvtps2ph_256 VR256:$src1, i32:$src2)),
8223 (VCVTPS2PHYmr addr:$dst, VR256:$src1, imm:$src2)>;
8256 (ins RC:$src1, RC:$src2, u8imm:$src3),
8258 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
8259 [(set RC:$dst, (OpVT (OpNode RC:$src1, RC:$src2, imm:$src3)))]>,
8262 (ins RC:$src1, x86memop:$src2, u8imm:$src3),
8264 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
8267 (bitconvert (memop_frag addr:$src2)), imm:$src3)))]>,
8447 (ins VR256:$src1, VR256:$src2),
8449 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8451 (OpVT (X86VPermv VR256:$src1, VR256:$src2)))]>,
8454 (ins VR256:$src1, i256mem:$src2),
8456 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8459 (bitconvert (mem_frag addr:$src2)))))]>,
8472 (ins VR256:$src1, u8imm:$src2),
8474 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8476 (OpVT (X86VPermi VR256:$src1, (i8 imm:$src2))))]>,
8479 (ins i256mem:$src1, u8imm:$src2),
8481 "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8484 (i8 imm:$src2))))]>,
8500 (ins VR256:$src1, VR256:$src2, u8imm:$src3),
8501 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8502 [(set VR256:$dst, (v4i64 (X86VPerm2x128 VR256:$src1, VR256:$src2,
8506 (ins VR256:$src1, f256mem:$src2, u8imm:$src3),
8507 "vperm2i128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8508 [(set VR256:$dst, (X86VPerm2x128 VR256:$src1, (loadv4i64 addr:$src2),
8513 def : Pat<(v8i32 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8514 (VPERM2I128rr VR256:$src1, VR256:$src2, imm:$imm)>;
8515 def : Pat<(v32i8 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8516 (VPERM2I128rr VR256:$src1, VR256:$src2, imm:$imm)>;
8517 def : Pat<(v16i16 (X86VPerm2x128 VR256:$src1, VR256:$src2, (i8 imm:$imm))),
8518 (VPERM2I128rr VR256:$src1, VR256:$src2, imm:$imm)>;
8520 def : Pat<(v32i8 (X86VPerm2x128 VR256:$src1, (bc_v32i8 (loadv4i64 addr:$src2)),
8522 (VPERM2I128rm VR256:$src1, addr:$src2, imm:$imm)>;
8524 (bc_v16i16 (loadv4i64 addr:$src2)), (i8 imm:$imm))),
8525 (VPERM2I128rm VR256:$src1, addr:$src2, imm:$imm)>;
8526 def : Pat<(v8i32 (X86VPerm2x128 VR256:$src1, (bc_v8i32 (loadv4i64 addr:$src2)),
8528 (VPERM2I128rm VR256:$src1, addr:$src2, imm:$imm)>;
8537 (ins VR256:$src1, VR128:$src2, u8imm:$src3),
8538 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8542 (ins VR256:$src1, i128mem:$src2, u8imm:$src3),
8543 "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}",
8548 def : Pat<(vinsert128_insert:$ins (v4i64 VR256:$src1), (v2i64 VR128:$src2),
8550 (VINSERTI128rr VR256:$src1, VR128:$src2,
8552 def : Pat<(vinsert128_insert:$ins (v8i32 VR256:$src1), (v4i32 VR128:$src2),
8554 (VINSERTI128rr VR256:$src1, VR128:$src2,
8556 def : Pat<(vinsert128_insert:$ins (v32i8 VR256:$src1), (v16i8 VR128:$src2),
8558 (VINSERTI128rr VR256:$src1, VR128:$src2,
8560 def : Pat<(vinsert128_insert:$ins (v16i16 VR256:$src1), (v8i16 VR128:$src2),
8562 (VINSERTI128rr VR256:$src1, VR128:$src2,
8565 def : Pat<(vinsert128_insert:$ins (v4i64 VR256:$src1), (loadv2i64 addr:$src2),
8567 (VINSERTI128rm VR256:$src1, addr:$src2,
8570 (bc_v4i32 (loadv2i64 addr:$src2)),
8572 (VINSERTI128rm VR256:$src1, addr:$src2,
8575 (bc_v16i8 (loadv2i64 addr:$src2)),
8577 (VINSERTI128rm VR256:$src1, addr:$src2,
8580 (bc_v8i16 (loadv2i64 addr:$src2)),
8582 (VINSERTI128rm VR256:$src1, addr:$src2,
8590 (ins VR256:$src1, u8imm:$src2),
8591 "vextracti128\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
8595 (ins i128mem:$dst, VR256:$src1, u8imm:$src2),
8596 "vextracti128\t{$src2, $src1, $dst|$dst, $src1, $src2}", []>,
8642 (ins VR128:$src1, i128mem:$src2),
8643 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8644 [(set VR128:$dst, (IntLd128 addr:$src2, VR128:$src1))]>, VEX_4V;
8646 (ins VR256:$src1, i256mem:$src2),
8647 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8648 [(set VR256:$dst, (IntLd256 addr:$src2, VR256:$src1))]>,
8651 (ins i128mem:$dst, VR128:$src1, VR128:$src2),
8652 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8653 [(IntSt128 addr:$dst, VR128:$src1, VR128:$src2)]>, VEX_4V;
8655 (ins i256mem:$dst, VR256:$src1, VR256:$src2),
8656 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8657 [(IntSt256 addr:$dst, VR256:$src1, VR256:$src2)]>, VEX_4V, VEX_L;
8713 (ins VR128:$src1, VR128:$src2),
8714 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8716 (vt128 (OpNode VR128:$src1, (vt128 VR128:$src2))))]>,
8719 (ins VR128:$src1, i128mem:$src2),
8720 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8723 (vt128 (bitconvert (loadv2i64 addr:$src2))))))]>,
8726 (ins VR256:$src1, VR256:$src2),
8727 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8729 (vt256 (OpNode VR256:$src1, (vt256 VR256:$src2))))]>,
8732 (ins VR256:$src1, i256mem:$src2),
8733 !strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
8736 (vt256 (bitconvert (loadv4i64 addr:$src2))))))]>,
8754 (ins VR128:$src1, memop128:$src2, VR128:$mask),
8756 "\t{$mask, $src2, $dst|$dst, $src2, $mask}"),
8759 (ins RC256:$src1, memop256:$src2, RC256:$mask),
8761 "\t{$mask, $src2, $dst|$dst, $src2, $mask}"),
8795 def : Pat<(X86fand FR128:$src1, (loadf128 addr:$src2)),
8797 (ANDPSrm (COPY_TO_REGCLASS FR128:$src1, VR128), f128mem:$src2),
8800 def : Pat<(X86fand FR128:$src1, FR128:$src2),
8803 (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
8805 def : Pat<(and FR128:$src1, FR128:$src2),
8808 (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
8810 def : Pat<(X86for FR128:$src1, (loadf128 addr:$src2)),
8812 (ORPSrm (COPY_TO_REGCLASS FR128:$src1, VR128), f128mem:$src2),
8815 def : Pat<(X86for FR128:$src1, FR128:$src2),
8818 (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
8820 def : Pat<(or FR128:$src1, FR128:$src2),
8823 (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
8825 def : Pat<(X86fxor FR128:$src1, (loadf128 addr:$src2)),
8827 (XORPSrm (COPY_TO_REGCLASS FR128:$src1, VR128), f128mem:$src2),
8830 def : Pat<(X86fxor FR128:$src1, FR128:$src2),
8833 (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;
8835 def : Pat<(xor FR128:$src1, FR128:$src2),
8838 (COPY_TO_REGCLASS FR128:$src2, VR128)), FR128)>;