Lines Matching refs:src3
150 (ins VR128:$src1, VR128:$src2, VR128:$src3),
152 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
154 (Int VR128:$src1, VR128:$src2, VR128:$src3))]>, XOP_4V, VEX_I8IMM;
156 (ins VR128:$src1, i128mem:$src2, VR128:$src3),
158 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
161 VR128:$src3))]>, XOP_4V, VEX_I8IMM;
201 (ins VR128:$src1, VR128:$src2, u8imm:$src3),
203 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
207 (ins VR128:$src1, i128mem:$src2, u8imm:$src3),
209 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
228 (ins VR128:$src1, VR128:$src2, VR128:$src3),
230 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
233 (vt128 VR128:$src3))))]>,
236 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
238 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
241 (vt128 (bitconvert (loadv2i64 addr:$src3))))))]>,
244 (ins VR128:$src1, i128mem:$src2, VR128:$src3),
246 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
249 (vt128 VR128:$src3))))]>,
254 (ins VR128:$src1, VR128:$src2, VR128:$src3),
256 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
269 (ins VR128:$src1, VR128:$src2, VR128:$src3),
271 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
272 [(set VR128:$dst, (Int128 VR128:$src1, VR128:$src2, VR128:$src3))]>,
275 (ins VR128:$src1, VR128:$src2, i128mem:$src3),
277 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
280 (bitconvert (loadv2i64 addr:$src3))))]>,
283 (ins VR128:$src1, i128mem:$src2, VR128:$src3),
285 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
288 VR128:$src3))]>,
293 (ins VR128:$src1, VR128:$src2, VR128:$src3),
295 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
300 (ins VR256:$src1, VR256:$src2, VR256:$src3),
302 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
303 [(set VR256:$dst, (Int256 VR256:$src1, VR256:$src2, VR256:$src3))]>,
306 (ins VR256:$src1, VR256:$src2, i256mem:$src3),
308 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
311 (bitconvert (loadv4i64 addr:$src3))))]>,
314 (ins VR256:$src1, f256mem:$src2, VR256:$src3),
316 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
319 VR256:$src3))]>,
324 (ins VR256:$src1, VR256:$src2, VR256:$src3),
326 "\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}"),
336 def : Pat<(v2i64 (or (and VR128:$src3, VR128:$src1),
337 (X86andnp VR128:$src3, VR128:$src2))),
338 (VPCMOVrrr VR128:$src1, VR128:$src2, VR128:$src3)>;
340 def : Pat<(v4i64 (or (and VR256:$src3, VR256:$src1),
341 (X86andnp VR256:$src3, VR256:$src2))),
342 (VPCMOVrrrY VR256:$src1, VR256:$src2, VR256:$src3)>;
350 (ins VR128:$src1, VR128:$src2, VR128:$src3, u8imm:$src4),
352 "\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
355 (id128 VR128:$src3), (i8 imm:$src4))))]>;
357 (ins VR128:$src1, VR128:$src2, i128mem:$src3, u8imm:$src4),
359 "\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
362 (id128 (bitconvert (loadv2i64 addr:$src3))),
366 (ins VR128:$src1, f128mem:$src2, VR128:$src3, u8imm:$src4),
368 "\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
372 (id128 VR128:$src3), (i8 imm:$src4))))]>;
376 (ins VR128:$src1, VR128:$src2, VR128:$src3, u8imm:$src4),
378 "\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
382 (ins VR256:$src1, VR256:$src2, VR256:$src3, u8imm:$src4),
384 "\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
387 (id256 VR256:$src3), (i8 imm:$src4))))]>, VEX_L;
389 (ins VR256:$src1, VR256:$src2, i256mem:$src3, u8imm:$src4),
391 "\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
394 (id256 (bitconvert (loadv4i64 addr:$src3))),
397 (ins VR256:$src1, f256mem:$src2, VR256:$src3, u8imm:$src4),
399 "\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),
403 (id256 VR256:$src3), (i8 imm:$src4))))]>, VEX_L;
407 (ins VR256:$src1, VR256:$src2, VR256:$src3, u8imm:$src4),
409 "\t{$src4, $src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3, $src4}"),