Lines Matching refs:retval_vec

221   %retval_vec =  call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> %acc_vec, <4 x i16> %prod)
222   %retval = extractelement <4 x i16> %retval_vec, i64 0
235   %retval_vec =  call <8 x i16> @llvm.aarch64.neon.sqadd.v8i16(<8 x i16> %acc_vec, <8 x i16> %prod)
236   %retval = extractelement <8 x i16> %retval_vec, i64 0
275   %retval_vec =  call <4 x i16> @llvm.aarch64.neon.sqsub.v4i16(<4 x i16> %acc_vec, <4 x i16> %prod)
276   %retval = extractelement <4 x i16> %retval_vec, i64 0
289   %retval_vec =  call <8 x i16> @llvm.aarch64.neon.sqsub.v8i16(<8 x i16> %acc_vec, <8 x i16> %prod)
290   %retval = extractelement <8 x i16> %retval_vec, i64 0
333 …%retval_vec =  call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> %acc_vec,  <4 x i16> %prod_…
334   %retval = extractelement <4 x i16> %retval_vec, i64 0
347 …%retval_vec =  call <4 x i32> @llvm.aarch64.neon.sqadd.v4i32(<4 x i32> %acc_vec,  <4 x i32> %prod_…
348   %retval = extractelement <4 x i32> %retval_vec, i64 0
362 …%retval_vec =  call <4 x i16> @llvm.aarch64.neon.sqsub.v4i16(<4 x i16> %acc_vec,  <4 x i16> %prod_…
363   %retval = extractelement <4 x i16> %retval_vec, i64 0
376 …%retval_vec =  call <4 x i32> @llvm.aarch64.neon.sqsub.v4i32(<4 x i32> %acc_vec,  <4 x i32> %prod_…
377   %retval = extractelement <4 x i32> %retval_vec, i64 0
414   %retval_vec =  call <4 x i16> @llvm.aarch64.neon.sqadd.v4i16(<4 x i16> %acc_vec, <4 x i16> %prod)
415   %retval = extractelement <4 x i16> %retval_vec, i32 0
439   %retval_vec =  call <8 x i16> @llvm.aarch64.neon.sqsub.v8i16(<8 x i16> %acc_vec, <8 x i16> %prod)
440   %retval = extractelement <8 x i16> %retval_vec, i32 0