Lines Matching refs:ADDR

16 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
17 ; CHECK: movt r[[ADDR]], :upper16:var8
20 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
24 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
39 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
40 ; CHECK: movt r[[ADDR]], :upper16:var16
43 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]]
47 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
62 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
63 ; CHECK: movt r[[ADDR]], :upper16:var32
66 ; CHECK: ldrex r[[OLD:[0-9]+]], [r[[ADDR]]]
70 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
85 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
86 ; CHECK: movt r[[ADDR]], :upper16:var64
89 ; CHECK: ldrexd r[[OLD1:[0-9]+]], r[[OLD2:[0-9]+]], [r[[ADDR]]]
96 ; CHECK-NEXT: strexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
102 ; CHECK: strd r[[OLD1]], r[[OLD2]], [r[[ADDR]]]
112 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
113 ; CHECK: movt r[[ADDR]], :upper16:var8
116 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
120 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
135 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
136 ; CHECK: movt r[[ADDR]], :upper16:var16
139 ; CHECK: ldrexh r[[OLD:[0-9]+]], [r[[ADDR]]]
143 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
158 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
159 ; CHECK: movt r[[ADDR]], :upper16:var32
162 ; CHECK: ldaex r[[OLD:[0-9]+]], [r[[ADDR]]]
166 ; CHECK-NEXT: strex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
181 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
182 ; CHECK: movt r[[ADDR]], :upper16:var64
185 ; CHECK: ldaexd r[[OLD1:[0-9]+]], r[[OLD2:[0-9]+]], [r[[ADDR]]]
192 ; CHECK-NEXT: stlexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
198 ; CHECK: strd r[[OLD1]], r[[OLD2]], [r[[ADDR]]]
208 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
209 ; CHECK: movt r[[ADDR]], :upper16:var8
212 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
216 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
231 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
232 ; CHECK: movt r[[ADDR]], :upper16:var16
235 ; CHECK: ldrexh r[[OLD:[0-9]+]], [r[[ADDR]]]
239 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
254 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
255 ; CHECK: movt r[[ADDR]], :upper16:var32
258 ; CHECK: ldaex r[[OLD:[0-9]+]], [r[[ADDR]]]
262 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
277 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
278 ; CHECK: movt r[[ADDR]], :upper16:var64
281 ; CHECK: ldaexd r[[OLD1:[0-9]+]], r[[OLD2:[0-9]+]], [r[[ADDR]]]
288 ; CHECK: strexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
294 ; CHECK: strd r[[OLD1]], r[[OLD2]], [r[[ADDR]]]
304 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
305 ; CHECK: movt r[[ADDR]], :upper16:var8
308 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
312 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
327 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
328 ; CHECK: movt r[[ADDR]], :upper16:var16
331 ; CHECK: ldrexh r[[OLD:[0-9]+]], [r[[ADDR]]]
335 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
350 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
351 ; CHECK: movt r[[ADDR]], :upper16:var32
354 ; CHECK: ldaex r[[OLD:[0-9]+]], [r[[ADDR]]]
358 ; CHECK-NEXT: strex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
373 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
374 ; CHECK: movt r[[ADDR]], :upper16:var64
377 ; CHECK: ldrexd r[[OLD1:[0-9]+]], r[[OLD2:[0-9]+]], [r[[ADDR]]]
384 ; CHECK: stlexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
390 ; CHECK: strd r[[OLD1]], r[[OLD2]], [r[[ADDR]]]
400 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
401 ; CHECK: movt r[[ADDR]], :upper16:var8
404 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
408 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
423 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
424 ; CHECK: movt r[[ADDR]], :upper16:var16
427 ; CHECK: ldrexh r[[OLD:[0-9]+]], [r[[ADDR]]]
431 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
446 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
447 ; CHECK: movt r[[ADDR]], :upper16:var32
450 ; CHECK: ldaex r[[OLD:[0-9]+]], [r[[ADDR]]]
454 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], [[NEW]], [r[[ADDR]]]
469 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
470 ; CHECK: movt r[[ADDR]], :upper16:var64
473 ; CHECK: ldrexd r[[OLD1:[0-9]+]], r[[OLD2:[0-9]+]], [r[[ADDR]]]
480 ; CHECK: strexd [[STATUS:r[0-9]+]], [[NEW1]], [[NEW2]], [r[[ADDR]]]
486 ; CHECK: strd r[[OLD1]], r[[OLD2]], [r[[ADDR]]]
496 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
497 ; CHECK: movt r[[ADDR]], :upper16:var8
500 ; CHECK: ldrexb r[[OLD:[0-9]+]], [r[[ADDR]]]
503 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
518 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
519 ; CHECK: movt r[[ADDR]], :upper16:var16
522 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]]
525 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
540 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
541 ; CHECK: movt r[[ADDR]], :upper16:var32
544 ; CHECK: ldrex r[[OLD:[0-9]+]], [r[[ADDR]]]
547 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r0, [r[[ADDR]]]
562 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
563 ; CHECK: movt r[[ADDR]], :upper16:var64
566 ; CHECK: ldaexd [[OLD1:r[0-9]+]], [[OLD2:r[0-9]+|lr]], [r[[ADDR]]]
569 ; CHECK-NEXT: strexd [[STATUS:r[0-9]+]], r0, r1, [r[[ADDR]]]
575 ; CHECK: strd [[OLD1]], [[OLD2]], [r[[ADDR]]]
585 ; CHECK-DAG: movw [[ADDR:r[0-9]+|lr]], :lower16:var8
586 ; CHECK-DAG: movt [[ADDR]], :upper16:var8
589 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
596 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]]
611 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var16
612 ; CHECK: movt [[ADDR]], :upper16:var16
615 ; CHECK: ldrexh r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
622 ; CHECK-NEXT: stlexh [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]
637 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
638 ; CHECK: movt r[[ADDR]], :upper16:var32
641 ; CHECK: ldrex r[[OLD:[0-9]+]], [r[[ADDR]]]
648 ; CHECK-NEXT: strex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
663 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
664 ; CHECK: movt r[[ADDR]], :upper16:var64
667 ; CHECK: ldaexd [[OLD1:r[0-9]+|lr]], [[OLD2:r[0-9]+|lr]], [r[[ADDR]]]
681 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
682 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
688 ; CHECK-ARM: strd [[OLD1]], [[OLD2]], [r[[ADDR]]]
698 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var8
699 ; CHECK: movt [[ADDR]], :upper16:var8
702 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
709 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], r[[OLDX]], {{.*}}[[ADDR]]
724 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
725 ; CHECK: movt r[[ADDR]], :upper16:var16
728 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]]
735 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[OLDX]], [r[[ADDR]]]
750 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
751 ; CHECK: movt r[[ADDR]], :upper16:var32
754 ; CHECK: ldrex r[[OLD:[0-9]+]], [r[[ADDR]]]
761 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
776 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
777 ; CHECK: movt r[[ADDR]], :upper16:var64
780 ; CHECK: ldrexd [[OLD1:r[0-9]+]], [[OLD2:r[0-9]+|lr]], [r[[ADDR]]]
794 ; CHECK-ARM: strexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
795 ; CHECK-THUMB: strexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
801 ; CHECK-ARM: strd [[OLD1]], [[OLD2]], [r[[ADDR]]]
811 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var8
812 ; CHECK: movt [[ADDR]], :upper16:var8
815 ; CHECK: ldrexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
822 ; CHECK-NEXT: strexb [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
837 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var16
838 ; CHECK: movt [[ADDR]], :upper16:var16
841 ; CHECK: ldaexh r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
848 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
863 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
864 ; CHECK: movt r[[ADDR]], :upper16:var32
867 ; CHECK: ldaex r[[OLD:[0-9]+]], [r[[ADDR]]]
874 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
889 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
890 ; CHECK: movt r[[ADDR]], :upper16:var64
893 ; CHECK: ldaexd [[OLD1:r[0-9]+|lr]], [[OLD2:r[0-9]+|lr]], [r[[ADDR]]]
907 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
908 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
914 ; CHECK-ARM: strd [[OLD1]], [[OLD2]], [r[[ADDR]]]
924 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var8
925 ; CHECK: movt [[ADDR]], :upper16:var8
928 ; CHECK: ldaexb r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
935 ; CHECK-NEXT: stlexb [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
950 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var16
951 ; CHECK: movt [[ADDR]], :upper16:var16
954 ; CHECK: ldrexh r[[OLD:[0-9]+]], {{.*}}[[ADDR]]
961 ; CHECK-NEXT: strexh [[STATUS:r[0-9]+]], r[[NEW]], {{.*}}[[ADDR]]
976 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
977 ; CHECK: movt r[[ADDR]], :upper16:var32
980 ; CHECK: ldaex r[[OLD:[0-9]+]], [r[[ADDR]]]
987 ; CHECK-NEXT: stlex [[STATUS:r[0-9]+]], r[[NEW]], [r[[ADDR]]]
1002 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
1003 ; CHECK: movt r[[ADDR]], :upper16:var64
1006 ; CHECK: ldaexd [[OLD1:r[0-9]+|lr]], [[OLD2:r[0-9]+|lr]], [r[[ADDR]]]
1020 ; CHECK-ARM: stlexd [[STATUS:r[0-9]+]], [[MINLO]], [[MINHI]], [r[[ADDR]]]
1021 ; CHECK-THUMB: stlexd [[STATUS:r[0-9]+]], {{r[0-9]+}}, {{r[0-9]+}}, [r[[ADDR]]]
1027 ; CHECK-ARM: strd [[OLD1]], [[OLD2]], [r[[ADDR]]]
1038 ; CHECK-DAG: movw r[[ADDR:[0-9]+]], :lower16:var8
1039 ; CHECK-DAG: movt r[[ADDR]], :upper16:var8
1043 ; CHECK: ldaexb r[[OLD:[0-9]+]], [r[[ADDR]]]
1051 ; CHECK: strexb [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
1071 ; CHECK-DAG: movw r[[ADDR:[0-9]+]], :lower16:var16
1072 ; CHECK-DAG: movt r[[ADDR]], :upper16:var16
1076 ; CHECK: ldaexh r[[OLD:[0-9]+]], [r[[ADDR]]]
1084 ; CHECK: stlexh [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
1105 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var32
1106 ; CHECK: movt r[[ADDR]], :upper16:var32
1109 ; CHECK: ldrex r[[OLD:[0-9]+]], [r[[ADDR]]]
1116 ; CHECK: stlex [[STATUS:r[0-9]+]], r1, [r[[ADDR]]]
1136 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
1137 ; CHECK: movt r[[ADDR]], :upper16:var64
1140 ; CHECK: ldrexd [[OLD1:r[0-9]+|lr]], [[OLD2:r[0-9]+|lr]], [r[[ADDR]]]
1154 ; CHECK: strexd [[STATUS:r[0-9]+]], r2, r3, [r[[ADDR]]]
1164 ; CHECK-ARM: strd [[OLD1]], [[OLD2]], [r[[ADDR]]]
1174 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1175 ; CHECK: movt r[[ADDR]], :upper16:var8
1176 ; CHECK: ldrb r0, [r[[ADDR]]]
1204 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1207 ; CHECK: movt r[[ADDR]], :upper16:var8
1210 ; CHECK: ldab r0, [r[[ADDR]]]
1221 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1224 ; CHECK: movt r[[ADDR]], :upper16:var8
1227 ; CHECK: ldab r0, [r[[ADDR]]]
1238 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
1241 ; CHECK: movt r[[ADDR]], :upper16:var16
1244 ; CHECK: ldrh r0, [r[[ADDR]]]
1272 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var64
1275 ; CHECK: movt r[[ADDR]], :upper16:var64
1278 ; CHECK: ldaexd r0, r1, [r[[ADDR]]]
1287 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1288 ; CHECK: movt r[[ADDR]], :upper16:var8
1289 ; CHECK: strb r0, [r[[ADDR]]]
1314 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1317 ; CHECK: movt r[[ADDR]], :upper16:var8
1320 ; CHECK: stlb r0, [r[[ADDR]]]
1331 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var8
1334 ; CHECK: movt r[[ADDR]], :upper16:var8
1337 ; CHECK: stlb r0, [r[[ADDR]]]
1348 ; CHECK: movw r[[ADDR:[0-9]+]], :lower16:var16
1351 ; CHECK: movt r[[ADDR]], :upper16:var16
1354 ; CHECK: strh r0, [r[[ADDR]]]
1385 ; CHECK: movw [[ADDR:r[0-9]+|lr]], :lower16:var64
1386 ; CHECK: movt [[ADDR]], :upper16:var64
1391 ; CHECK: stlexd [[STATUS:r[0-9]+]], r0, r1, {{.*}}[[ADDR]]