Lines Matching refs:vw
24 %9 = tail call i64 @llvm.hexagon.S2.asl.i.vw(i64 %8, i32 1)
40 %14 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %13, i32 31)
48 %20 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %19, i32 %gb)
69 %25 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %24, i32 31)
77 %31 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %30, i32 %gb)
98 %36 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %35, i32 31)
106 %42 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %41, i32 %gb)
127 %47 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %46, i32 31)
135 %53 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %52, i32 %gb)
156 %58 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %57, i32 31)
164 %64 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %63, i32 %gb)
185 %69 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %68, i32 31)
193 %75 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %74, i32 %gb)
214 %80 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %79, i32 31)
222 %86 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %85, i32 %gb)
243 %91 = tail call i64 @llvm.hexagon.S2.asr.i.vw(i64 %90, i32 31)
251 %97 = tail call i64 @llvm.hexagon.S2.asl.r.vw(i64 %96, i32 %gb)
262 declare i64 @llvm.hexagon.S2.asr.i.vw(i64, i32) #1
264 declare i64 @llvm.hexagon.S2.asl.i.vw(i64, i32) #1
272 declare i64 @llvm.hexagon.S2.asl.r.vw(i64, i32) #1