Lines Matching refs:suq
11 declare i32 @llvm.nvvm.suq.width(i64)
12 declare i32 @llvm.nvvm.suq.height(i64)
61 ; SM20: suq.width.b32
62 ; SM30: suq.width.b32
63 %width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
72 ; SM20: suq.width.b32 %r{{[0-9]+}}, [surf0]
73 ; SM30: suq.width.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
74 %width = tail call i32 @llvm.nvvm.suq.width(i64 %surfHandle)
82 ; SM20: suq.height.b32
83 ; SM30: suq.height.b32
84 %height = tail call i32 @llvm.nvvm.suq.height(i64 %surfHandle)
93 ; SM20: suq.height.b32 %r{{[0-9]+}}, [surf0]
94 ; SM30: suq.height.b32 %r{{[0-9]+}}, [%rd[[HANDLE:[0-9]+]]]
95 %height = tail call i32 @llvm.nvvm.suq.height(i64 %surfHandle)