Lines Matching refs:SSE
2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X32-SSE --check-…
3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64-SSE --chec…
10 ; X32-SSE-LABEL: and_i24_as_v3i8:
11 ; X32-SSE: # BB#0:
12 ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
13 ; X32-SSE-NEXT: andl {{[0-9]+}}(%esp), %eax
14 ; X32-SSE-NEXT: retl
16 ; X64-SSE-LABEL: and_i24_as_v3i8:
17 ; X64-SSE: # BB#0:
18 ; X64-SSE-NEXT: andl %esi, %edi
19 ; X64-SSE-NEXT: movl %edi, %eax
20 ; X64-SSE-NEXT: retq
29 ; X32-SSE-LABEL: xor_i24_as_v3i8:
30 ; X32-SSE: # BB#0:
31 ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
32 ; X32-SSE-NEXT: xorl {{[0-9]+}}(%esp), %eax
33 ; X32-SSE-NEXT: retl
35 ; X64-SSE-LABEL: xor_i24_as_v3i8:
36 ; X64-SSE: # BB#0:
37 ; X64-SSE-NEXT: xorl %esi, %edi
38 ; X64-SSE-NEXT: movl %edi, %eax
39 ; X64-SSE-NEXT: retq
48 ; X32-SSE-LABEL: or_i24_as_v3i8:
49 ; X32-SSE: # BB#0:
50 ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
51 ; X32-SSE-NEXT: orl {{[0-9]+}}(%esp), %eax
52 ; X32-SSE-NEXT: retl
54 ; X64-SSE-LABEL: or_i24_as_v3i8:
55 ; X64-SSE: # BB#0:
56 ; X64-SSE-NEXT: orl %esi, %edi
57 ; X64-SSE-NEXT: movl %edi, %eax
58 ; X64-SSE-NEXT: retq
71 ; X32-SSE-LABEL: and_i24_as_v8i3:
72 ; X32-SSE: # BB#0:
73 ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
74 ; X32-SSE-NEXT: andl {{[0-9]+}}(%esp), %eax
75 ; X32-SSE-NEXT: retl
77 ; X64-SSE-LABEL: and_i24_as_v8i3:
78 ; X64-SSE: # BB#0:
79 ; X64-SSE-NEXT: andl %esi, %edi
80 ; X64-SSE-NEXT: movl %edi, %eax
81 ; X64-SSE-NEXT: retq
90 ; X32-SSE-LABEL: xor_i24_as_v8i3:
91 ; X32-SSE: # BB#0:
92 ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
93 ; X32-SSE-NEXT: xorl {{[0-9]+}}(%esp), %eax
94 ; X32-SSE-NEXT: retl
96 ; X64-SSE-LABEL: xor_i24_as_v8i3:
97 ; X64-SSE: # BB#0:
98 ; X64-SSE-NEXT: xorl %esi, %edi
99 ; X64-SSE-NEXT: movl %edi, %eax
100 ; X64-SSE-NEXT: retq
109 ; X32-SSE-LABEL: or_i24_as_v8i3:
110 ; X32-SSE: # BB#0:
111 ; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax
112 ; X32-SSE-NEXT: orl {{[0-9]+}}(%esp), %eax
113 ; X32-SSE-NEXT: retl
115 ; X64-SSE-LABEL: or_i24_as_v8i3:
116 ; X64-SSE: # BB#0:
117 ; X64-SSE-NEXT: orl %esi, %edi
118 ; X64-SSE-NEXT: movl %edi, %eax
119 ; X64-SSE-NEXT: retq
132 ; X32-SSE-LABEL: and_v3i8_as_i24:
133 ; X32-SSE: # BB#0:
134 ; X32-SSE-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm0
135 ; X32-SSE-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm0
136 ; X32-SSE-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm0
137 ; X32-SSE-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm1
138 ; X32-SSE-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm1
139 ; X32-SSE-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm1
140 ; X32-SSE-NEXT: pand %xmm0, %xmm1
141 ; X32-SSE-NEXT: pextrb $0, %xmm1, %eax
142 ; X32-SSE-NEXT: pextrb $4, %xmm1, %edx
143 ; X32-SSE-NEXT: pextrb $8, %xmm1, %ecx
144 ; X32-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
145 ; X32-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
146 ; X32-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
147 ; X32-SSE-NEXT: retl
149 ; X64-SSE-LABEL: and_v3i8_as_i24:
150 ; X64-SSE: # BB#0:
151 ; X64-SSE-NEXT: movd %ecx, %xmm0
152 ; X64-SSE-NEXT: pinsrd $1, %r8d, %xmm0
153 ; X64-SSE-NEXT: pinsrd $2, %r9d, %xmm0
154 ; X64-SSE-NEXT: movd %edi, %xmm1
155 ; X64-SSE-NEXT: pinsrd $1, %esi, %xmm1
156 ; X64-SSE-NEXT: pinsrd $2, %edx, %xmm1
157 ; X64-SSE-NEXT: pand %xmm0, %xmm1
158 ; X64-SSE-NEXT: pextrb $0, %xmm1, %eax
159 ; X64-SSE-NEXT: pextrb $4, %xmm1, %edx
160 ; X64-SSE-NEXT: pextrb $8, %xmm1, %ecx
161 ; X64-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
162 ; X64-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
163 ; X64-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
164 ; X64-SSE-NEXT: retq
173 ; X32-SSE-LABEL: xor_v3i8_as_i24:
174 ; X32-SSE: # BB#0:
175 ; X32-SSE-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm0
176 ; X32-SSE-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm0
177 ; X32-SSE-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm0
178 ; X32-SSE-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm1
179 ; X32-SSE-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm1
180 ; X32-SSE-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm1
181 ; X32-SSE-NEXT: pxor %xmm0, %xmm1
182 ; X32-SSE-NEXT: pextrb $0, %xmm1, %eax
183 ; X32-SSE-NEXT: pextrb $4, %xmm1, %edx
184 ; X32-SSE-NEXT: pextrb $8, %xmm1, %ecx
185 ; X32-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
186 ; X32-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
187 ; X32-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
188 ; X32-SSE-NEXT: retl
190 ; X64-SSE-LABEL: xor_v3i8_as_i24:
191 ; X64-SSE: # BB#0:
192 ; X64-SSE-NEXT: movd %ecx, %xmm0
193 ; X64-SSE-NEXT: pinsrd $1, %r8d, %xmm0
194 ; X64-SSE-NEXT: pinsrd $2, %r9d, %xmm0
195 ; X64-SSE-NEXT: movd %edi, %xmm1
196 ; X64-SSE-NEXT: pinsrd $1, %esi, %xmm1
197 ; X64-SSE-NEXT: pinsrd $2, %edx, %xmm1
198 ; X64-SSE-NEXT: pxor %xmm0, %xmm1
199 ; X64-SSE-NEXT: pextrb $0, %xmm1, %eax
200 ; X64-SSE-NEXT: pextrb $4, %xmm1, %edx
201 ; X64-SSE-NEXT: pextrb $8, %xmm1, %ecx
202 ; X64-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
203 ; X64-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
204 ; X64-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
205 ; X64-SSE-NEXT: retq
214 ; X32-SSE-LABEL: or_v3i8_as_i24:
215 ; X32-SSE: # BB#0:
216 ; X32-SSE-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm0
217 ; X32-SSE-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm0
218 ; X32-SSE-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm0
219 ; X32-SSE-NEXT: pinsrb $0, {{[0-9]+}}(%esp), %xmm1
220 ; X32-SSE-NEXT: pinsrb $4, {{[0-9]+}}(%esp), %xmm1
221 ; X32-SSE-NEXT: pinsrb $8, {{[0-9]+}}(%esp), %xmm1
222 ; X32-SSE-NEXT: por %xmm0, %xmm1
223 ; X32-SSE-NEXT: pextrb $0, %xmm1, %eax
224 ; X32-SSE-NEXT: pextrb $4, %xmm1, %edx
225 ; X32-SSE-NEXT: pextrb $8, %xmm1, %ecx
226 ; X32-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
227 ; X32-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
228 ; X32-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
229 ; X32-SSE-NEXT: retl
231 ; X64-SSE-LABEL: or_v3i8_as_i24:
232 ; X64-SSE: # BB#0:
233 ; X64-SSE-NEXT: movd %ecx, %xmm0
234 ; X64-SSE-NEXT: pinsrd $1, %r8d, %xmm0
235 ; X64-SSE-NEXT: pinsrd $2, %r9d, %xmm0
236 ; X64-SSE-NEXT: movd %edi, %xmm1
237 ; X64-SSE-NEXT: pinsrd $1, %esi, %xmm1
238 ; X64-SSE-NEXT: pinsrd $2, %edx, %xmm1
239 ; X64-SSE-NEXT: por %xmm0, %xmm1
240 ; X64-SSE-NEXT: pextrb $0, %xmm1, %eax
241 ; X64-SSE-NEXT: pextrb $4, %xmm1, %edx
242 ; X64-SSE-NEXT: pextrb $8, %xmm1, %ecx
243 ; X64-SSE-NEXT: # kill: %AL<def> %AL<kill> %EAX<kill>
244 ; X64-SSE-NEXT: # kill: %DL<def> %DL<kill> %EDX<kill>
245 ; X64-SSE-NEXT: # kill: %CL<def> %CL<kill> %ECX<kill>
246 ; X64-SSE-NEXT: retq
259 ; X32-SSE-LABEL: and_v8i3_as_i24:
260 ; X32-SSE: # BB#0:
261 ; X32-SSE-NEXT: andps %xmm1, %xmm0
262 ; X32-SSE-NEXT: retl
264 ; X64-SSE-LABEL: and_v8i3_as_i24:
265 ; X64-SSE: # BB#0:
266 ; X64-SSE-NEXT: andps %xmm1, %xmm0
267 ; X64-SSE-NEXT: retq
276 ; X32-SSE-LABEL: xor_v8i3_as_i24:
277 ; X32-SSE: # BB#0:
278 ; X32-SSE-NEXT: xorps %xmm1, %xmm0
279 ; X32-SSE-NEXT: retl
281 ; X64-SSE-LABEL: xor_v8i3_as_i24:
282 ; X64-SSE: # BB#0:
283 ; X64-SSE-NEXT: xorps %xmm1, %xmm0
284 ; X64-SSE-NEXT: retq
293 ; X32-SSE-LABEL: or_v8i3_as_i24:
294 ; X32-SSE: # BB#0:
295 ; X32-SSE-NEXT: orps %xmm1, %xmm0
296 ; X32-SSE-NEXT: retl
298 ; X64-SSE-LABEL: or_v8i3_as_i24:
299 ; X64-SSE: # BB#0:
300 ; X64-SSE-NEXT: orps %xmm1, %xmm0
301 ; X64-SSE-NEXT: retq