Lines Matching refs:fpu
8502 static void Print_x86_float_state_t(MachO::x86_float_state64_t &fpu) { in Print_x86_float_state_t() argument
8503 outs() << "\t fpu_reserved[0] " << fpu.fpu_reserved[0]; in Print_x86_float_state_t()
8504 outs() << " fpu_reserved[1] " << fpu.fpu_reserved[1] << "\n"; in Print_x86_float_state_t()
8505 outs() << "\t control: invalid " << fpu.fpu_fcw.invalid; in Print_x86_float_state_t()
8506 outs() << " denorm " << fpu.fpu_fcw.denorm; in Print_x86_float_state_t()
8507 outs() << " zdiv " << fpu.fpu_fcw.zdiv; in Print_x86_float_state_t()
8508 outs() << " ovrfl " << fpu.fpu_fcw.ovrfl; in Print_x86_float_state_t()
8509 outs() << " undfl " << fpu.fpu_fcw.undfl; in Print_x86_float_state_t()
8510 outs() << " precis " << fpu.fpu_fcw.precis << "\n"; in Print_x86_float_state_t()
8512 if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_24B) in Print_x86_float_state_t()
8514 else if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_53B) in Print_x86_float_state_t()
8516 else if (fpu.fpu_fcw.pc == MachO::x86_FP_PREC_64B) in Print_x86_float_state_t()
8519 outs() << fpu.fpu_fcw.pc << " "; in Print_x86_float_state_t()
8521 if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_NEAR) in Print_x86_float_state_t()
8523 else if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_DOWN) in Print_x86_float_state_t()
8525 else if (fpu.fpu_fcw.rc == MachO::x86_FP_RND_UP) in Print_x86_float_state_t()
8527 else if (fpu.fpu_fcw.rc == MachO::x86_FP_CHOP) in Print_x86_float_state_t()
8530 outs() << "\t status: invalid " << fpu.fpu_fsw.invalid; in Print_x86_float_state_t()
8531 outs() << " denorm " << fpu.fpu_fsw.denorm; in Print_x86_float_state_t()
8532 outs() << " zdiv " << fpu.fpu_fsw.zdiv; in Print_x86_float_state_t()
8533 outs() << " ovrfl " << fpu.fpu_fsw.ovrfl; in Print_x86_float_state_t()
8534 outs() << " undfl " << fpu.fpu_fsw.undfl; in Print_x86_float_state_t()
8535 outs() << " precis " << fpu.fpu_fsw.precis; in Print_x86_float_state_t()
8536 outs() << " stkflt " << fpu.fpu_fsw.stkflt << "\n"; in Print_x86_float_state_t()
8537 outs() << "\t errsumm " << fpu.fpu_fsw.errsumm; in Print_x86_float_state_t()
8538 outs() << " c0 " << fpu.fpu_fsw.c0; in Print_x86_float_state_t()
8539 outs() << " c1 " << fpu.fpu_fsw.c1; in Print_x86_float_state_t()
8540 outs() << " c2 " << fpu.fpu_fsw.c2; in Print_x86_float_state_t()
8541 outs() << " tos " << fpu.fpu_fsw.tos; in Print_x86_float_state_t()
8542 outs() << " c3 " << fpu.fpu_fsw.c3; in Print_x86_float_state_t()
8543 outs() << " busy " << fpu.fpu_fsw.busy << "\n"; in Print_x86_float_state_t()
8544 outs() << "\t fpu_ftw " << format("0x%02" PRIx32, fpu.fpu_ftw); in Print_x86_float_state_t()
8545 outs() << " fpu_rsrv1 " << format("0x%02" PRIx32, fpu.fpu_rsrv1); in Print_x86_float_state_t()
8546 outs() << " fpu_fop " << format("0x%04" PRIx32, fpu.fpu_fop); in Print_x86_float_state_t()
8547 outs() << " fpu_ip " << format("0x%08" PRIx32, fpu.fpu_ip) << "\n"; in Print_x86_float_state_t()
8548 outs() << "\t fpu_cs " << format("0x%04" PRIx32, fpu.fpu_cs); in Print_x86_float_state_t()
8549 outs() << " fpu_rsrv2 " << format("0x%04" PRIx32, fpu.fpu_rsrv2); in Print_x86_float_state_t()
8550 outs() << " fpu_dp " << format("0x%08" PRIx32, fpu.fpu_dp); in Print_x86_float_state_t()
8551 outs() << " fpu_ds " << format("0x%04" PRIx32, fpu.fpu_ds) << "\n"; in Print_x86_float_state_t()
8552 outs() << "\t fpu_rsrv3 " << format("0x%04" PRIx32, fpu.fpu_rsrv3); in Print_x86_float_state_t()
8553 outs() << " fpu_mxcsr " << format("0x%08" PRIx32, fpu.fpu_mxcsr); in Print_x86_float_state_t()
8554 outs() << " fpu_mxcsrmask " << format("0x%08" PRIx32, fpu.fpu_mxcsrmask); in Print_x86_float_state_t()
8557 Print_mmst_reg(fpu.fpu_stmm0); in Print_x86_float_state_t()
8559 Print_mmst_reg(fpu.fpu_stmm1); in Print_x86_float_state_t()
8561 Print_mmst_reg(fpu.fpu_stmm2); in Print_x86_float_state_t()
8563 Print_mmst_reg(fpu.fpu_stmm3); in Print_x86_float_state_t()
8565 Print_mmst_reg(fpu.fpu_stmm4); in Print_x86_float_state_t()
8567 Print_mmst_reg(fpu.fpu_stmm5); in Print_x86_float_state_t()
8569 Print_mmst_reg(fpu.fpu_stmm6); in Print_x86_float_state_t()
8571 Print_mmst_reg(fpu.fpu_stmm7); in Print_x86_float_state_t()
8573 Print_xmm_reg(fpu.fpu_xmm0); in Print_x86_float_state_t()
8575 Print_xmm_reg(fpu.fpu_xmm1); in Print_x86_float_state_t()
8577 Print_xmm_reg(fpu.fpu_xmm2); in Print_x86_float_state_t()
8579 Print_xmm_reg(fpu.fpu_xmm3); in Print_x86_float_state_t()
8581 Print_xmm_reg(fpu.fpu_xmm4); in Print_x86_float_state_t()
8583 Print_xmm_reg(fpu.fpu_xmm5); in Print_x86_float_state_t()
8585 Print_xmm_reg(fpu.fpu_xmm6); in Print_x86_float_state_t()
8587 Print_xmm_reg(fpu.fpu_xmm7); in Print_x86_float_state_t()
8589 Print_xmm_reg(fpu.fpu_xmm8); in Print_x86_float_state_t()
8591 Print_xmm_reg(fpu.fpu_xmm9); in Print_x86_float_state_t()
8593 Print_xmm_reg(fpu.fpu_xmm10); in Print_x86_float_state_t()
8595 Print_xmm_reg(fpu.fpu_xmm11); in Print_x86_float_state_t()
8597 Print_xmm_reg(fpu.fpu_xmm12); in Print_x86_float_state_t()
8599 Print_xmm_reg(fpu.fpu_xmm13); in Print_x86_float_state_t()
8601 Print_xmm_reg(fpu.fpu_xmm14); in Print_x86_float_state_t()
8603 Print_xmm_reg(fpu.fpu_xmm15); in Print_x86_float_state_t()
8608 outs() << format("%02" PRIx32, fpu.fpu_rsrv4[f * g]) << " "; in Print_x86_float_state_t()
8611 outs() << "\t fpu_reserved1 " << format("0x%08" PRIx32, fpu.fpu_reserved1); in Print_x86_float_state_t()