Lines Matching refs:bankWidth

780     if (tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize)  in HwlReduceBankWidthHeight()
785 if (stillGreater && pTileInfo->bankWidth > 1) in HwlReduceBankWidthHeight()
787 while (stillGreater && pTileInfo->bankWidth > 0) in HwlReduceBankWidthHeight()
789 pTileInfo->bankWidth >>= 1; in HwlReduceBankWidthHeight()
791 if (pTileInfo->bankWidth == 0) in HwlReduceBankWidthHeight()
793 pTileInfo->bankWidth = 1; in HwlReduceBankWidthHeight()
798 tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; in HwlReduceBankWidthHeight()
804 (tileSize * pTileInfo->bankWidth) in HwlReduceBankWidthHeight()
814 (tileSize * pipes * pTileInfo->bankWidth) in HwlReduceBankWidthHeight()
841 tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; in HwlReduceBankWidthHeight()
852 tileSize, pTileInfo->bankWidth, pTileInfo->bankHeight, m_rowSize)); in HwlReduceBankWidthHeight()
908 (tileSize * pTileInfo->bankWidth) in ComputeSurfaceAlignmentsMacroTiled()
920 (tileSize * pipes * pTileInfo->bankWidth) in ComputeSurfaceAlignmentsMacroTiled()
936 macroTileWidth = MicroTileWidth * pTileInfo->bankWidth * pipes * in ComputeSurfaceAlignmentsMacroTiled()
957 pipes * pTileInfo->bankWidth * pTileInfo->banks * pTileInfo->bankHeight * tileSize; in ComputeSurfaceAlignmentsMacroTiled()
997 switch (pTileInfo->bankWidth) in SanityCheckMacroTiled()
1122 bytesPerTile * HwlGetPipes(pTileInfo) * pTileInfo->bankWidth * pTileInfo->macroAspectRatio; in ComputeSurfaceMipLevelTileMode()
1125 bytesPerTile * pTileInfo->bankWidth * pTileInfo->bankHeight; in ComputeSurfaceMipLevelTileMode()
1470 for (UINT_32 i = 0; i < Log2(pTileInfo->bankWidth); i++) in ComputeMacroTileEquation()
1495 (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; in ComputeMacroTileEquation()
1736 (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; in ComputeSurfaceAddrFromCoordMacroTiled()
1779 tileColumnIndex = ((x / MicroTileWidth) / numPipes) % pTileInfo->bankWidth; in ComputeSurfaceAddrFromCoordMacroTiled()
1780 tileIndex = (tileRowIndex * pTileInfo->bankWidth) + tileColumnIndex; in ComputeSurfaceAddrFromCoordMacroTiled()
2393 UINT_32 macroWidth = pTileInfo->bankWidth * pipes * pTileInfo->macroAspectRatio; in ComputeSurfaceCoordFromAddrMacroTiled()
2442 my = (tileIndex / pTileInfo->bankWidth) % pTileInfo->bankHeight * MicroTileHeight; in ComputeSurfaceCoordFromAddrMacroTiled()
2443 mx = (tileIndex % pTileInfo->bankWidth) * pipes * MicroTileWidth; in ComputeSurfaceCoordFromAddrMacroTiled()
2506 UINT_32 xBit = x / (MicroTileWidth * pTileInfo->bankWidth * numPipes); in ComputeSurfaceCoord2DFromBankPipe()
2974 UINT_32 bankWidth = pTileInfo->bankWidth; in ComputeBankFromCoord() local
2977 UINT_32 tx = x / MicroTileWidth / (bankWidth * pipes); in ComputeBankFromCoord()
3493 (pTileInfo->bankWidth != 0) || in IsTileInfoAllZero()
3525 pLeft->bankWidth == pRight->bankWidth && in HwlTileInfoEqual()
3580 switch (pTileInfoIn->bankWidth) in HwlConvertTileInfoToHW()
3583 pTileInfoOut->bankWidth = 0; in HwlConvertTileInfoToHW()
3586 pTileInfoOut->bankWidth = 1; in HwlConvertTileInfoToHW()
3589 pTileInfoOut->bankWidth = 2; in HwlConvertTileInfoToHW()
3592 pTileInfoOut->bankWidth = 3; in HwlConvertTileInfoToHW()
3597 pTileInfoOut->bankWidth = 0; in HwlConvertTileInfoToHW()
3696 switch (pTileInfoIn->bankWidth) in HwlConvertTileInfoToHW()
3699 pTileInfoOut->bankWidth = 1; in HwlConvertTileInfoToHW()
3702 pTileInfoOut->bankWidth = 2; in HwlConvertTileInfoToHW()
3705 pTileInfoOut->bankWidth = 4; in HwlConvertTileInfoToHW()
3708 pTileInfoOut->bankWidth = 8; in HwlConvertTileInfoToHW()
3713 pTileInfoOut->bankWidth = 1; in HwlConvertTileInfoToHW()
3877 ADDR_ASSERT(tileInfo.bankWidth == pIn->pTileInfo->bankWidth); in HwlComputeSurfaceInfo()