816                 pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio,  in HwlReduceBankWidthHeight()
922 …          pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, macroAspectAlign);  in ComputeSurfaceAlignmentsMacroTiled()
937             pTileInfo->macroAspectRatio;  in ComputeSurfaceAlignmentsMacroTiled()
948             pTileInfo->macroAspectRatio;  in ComputeSurfaceAlignmentsMacroTiled()
1027         switch (pTileInfo->macroAspectRatio)  in SanityCheckMacroTiled()
1042         if (pTileInfo->banks < pTileInfo->macroAspectRatio)  in SanityCheckMacroTiled()
1122         bytesPerTile * HwlGetPipes(pTileInfo) * pTileInfo->bankWidth * pTileInfo->macroAspectRatio;  in ComputeSurfaceMipLevelTileMode()
1495                 (MicroTileWidth  * pTileInfo->bankWidth  * numPipes) * pTileInfo->macroAspectRatio;  in ComputeMacroTileEquation()
1498                 pTileInfo->macroAspectRatio;  in ComputeMacroTileEquation()
1736         (MicroTileWidth  * pTileInfo->bankWidth  * numPipes) * pTileInfo->macroAspectRatio;  in ComputeSurfaceAddrFromCoordMacroTiled()
1738         (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / pTileInfo->macroAspectRatio;  in ComputeSurfaceAddrFromCoordMacroTiled()
2393     UINT_32 macroWidth  = pTileInfo->bankWidth * pipes * pTileInfo->macroAspectRatio;  in ComputeSurfaceCoordFromAddrMacroTiled()
2395     UINT_32 macroHeight = pTileInfo->bankHeight * banks / pTileInfo->macroAspectRatio;  in ComputeSurfaceCoordFromAddrMacroTiled()
2542     if (pTileInfo->macroAspectRatio == 1)  in ComputeSurfaceCoord2DFromBankPipe()
2569     else if (pTileInfo->macroAspectRatio == 2)  in ComputeSurfaceCoord2DFromBankPipe()
2595     else if (pTileInfo->macroAspectRatio == 4)  in ComputeSurfaceCoord2DFromBankPipe()
2618     else if (pTileInfo->macroAspectRatio == 8)  in ComputeSurfaceCoord2DFromBankPipe()
3495             (pTileInfo->macroAspectRatio != 0)  ||  in IsTileInfoAllZero()
3527         pLeft->macroAspectRatio == pRight->macroAspectRatio &&  in HwlTileInfoEqual()
3622             switch (pTileInfoIn->macroAspectRatio)  in HwlConvertTileInfoToHW()
3625                     pTileInfoOut->macroAspectRatio = 0;  in HwlConvertTileInfoToHW()
3628                     pTileInfoOut->macroAspectRatio = 1;  in HwlConvertTileInfoToHW()
3631                     pTileInfoOut->macroAspectRatio = 2;  in HwlConvertTileInfoToHW()
3634                     pTileInfoOut->macroAspectRatio = 3;  in HwlConvertTileInfoToHW()
3639                     pTileInfoOut->macroAspectRatio = 0;  in HwlConvertTileInfoToHW()
3738             switch (pTileInfoIn->macroAspectRatio)  in HwlConvertTileInfoToHW()
3741                     pTileInfoOut->macroAspectRatio = 1;  in HwlConvertTileInfoToHW()
3744                     pTileInfoOut->macroAspectRatio = 2;  in HwlConvertTileInfoToHW()
3747                     pTileInfoOut->macroAspectRatio = 4;  in HwlConvertTileInfoToHW()
3750                     pTileInfoOut->macroAspectRatio = 8;  in HwlConvertTileInfoToHW()
3755                     pTileInfoOut->macroAspectRatio = 1;  in HwlConvertTileInfoToHW()
3879                     ADDR_ASSERT(tileInfo.macroAspectRatio == pIn->pTileInfo->macroAspectRatio);  in HwlComputeSurfaceInfo()
4146     if (pTileInfo->macroAspectRatio > 2)  in HwlStereoCheckRightOffsetPadding()