Lines Matching refs:pTileInfo
102 ADDR_TILEINFO* pTileInfo = &tileInfoDef; in DispatchComputeSurfaceInfo() local
123 ADDR_ASSERT(pOut->pTileInfo); in DispatchComputeSurfaceInfo()
125 if (pOut->pTileInfo != NULL) in DispatchComputeSurfaceInfo()
127 pTileInfo = pOut->pTileInfo; in DispatchComputeSurfaceInfo()
131 if (pIn->pTileInfo != NULL) in DispatchComputeSurfaceInfo()
133 if (pTileInfo != pIn->pTileInfo) in DispatchComputeSurfaceInfo()
135 *pTileInfo = *pIn->pTileInfo; in DispatchComputeSurfaceInfo()
140 memset(pTileInfo, 0, sizeof(ADDR_TILEINFO)); in DispatchComputeSurfaceInfo()
150 pIn->pTileInfo, in DispatchComputeSurfaceInfo()
151 pTileInfo, in DispatchComputeSurfaceInfo()
264 pOut->pTileInfo, in ComputeSurfaceInfoLinear()
416 pOut->pTileInfo, in ComputeSurfaceInfoMicroTiled()
517 pOut->pTileInfo); in ComputeSurfaceInfoMacroTiled()
555 pOut->pTileInfo, in ComputeSurfaceInfoMacroTiled()
565 UINT_32 stereoHeightAlign = HwlStereoCheckRightOffsetPadding(pOut->pTileInfo); in ComputeSurfaceInfoMacroTiled()
596 pOut->pTileInfo); in ComputeSurfaceInfoMacroTiled()
774 ADDR_TILEINFO* pTileInfo ///< [in,out] bank structure. in HwlReduceBankWidthHeight()
780 if (tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize) in HwlReduceBankWidthHeight()
785 if (stillGreater && pTileInfo->bankWidth > 1) in HwlReduceBankWidthHeight()
787 while (stillGreater && pTileInfo->bankWidth > 0) in HwlReduceBankWidthHeight()
789 pTileInfo->bankWidth >>= 1; in HwlReduceBankWidthHeight()
791 if (pTileInfo->bankWidth == 0) in HwlReduceBankWidthHeight()
793 pTileInfo->bankWidth = 1; in HwlReduceBankWidthHeight()
798 tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; in HwlReduceBankWidthHeight()
804 (tileSize * pTileInfo->bankWidth) in HwlReduceBankWidthHeight()
808 ADDR_ASSERT((pTileInfo->bankHeight % bankHeightAlign) == 0); in HwlReduceBankWidthHeight()
814 (tileSize * pipes * pTileInfo->bankWidth) in HwlReduceBankWidthHeight()
816 pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, in HwlReduceBankWidthHeight()
828 if (stillGreater && pTileInfo->bankHeight > bankHeightAlign) in HwlReduceBankWidthHeight()
830 while (stillGreater && pTileInfo->bankHeight > bankHeightAlign) in HwlReduceBankWidthHeight()
832 pTileInfo->bankHeight >>= 1; in HwlReduceBankWidthHeight()
834 if (pTileInfo->bankHeight < bankHeightAlign) in HwlReduceBankWidthHeight()
836 pTileInfo->bankHeight = bankHeightAlign; in HwlReduceBankWidthHeight()
841 tileSize * pTileInfo->bankWidth * pTileInfo->bankHeight > m_rowSize; in HwlReduceBankWidthHeight()
852 tileSize, pTileInfo->bankWidth, pTileInfo->bankHeight, m_rowSize)); in HwlReduceBankWidthHeight()
880 ADDR_TILEINFO* pTileInfo = pOut->pTileInfo; in ComputeSurfaceAlignmentsMacroTiled() local
882 BOOL_32 valid = SanityCheckMacroTiled(pTileInfo); in ComputeSurfaceAlignmentsMacroTiled()
894 UINT_32 pipes = HwlGetPipes(pTileInfo); in ComputeSurfaceAlignmentsMacroTiled()
901 tileSize = Min(pTileInfo->tileSplitBytes, in ComputeSurfaceAlignmentsMacroTiled()
908 (tileSize * pTileInfo->bankWidth) in ComputeSurfaceAlignmentsMacroTiled()
911 pTileInfo->bankHeight = PowTwoAlign(pTileInfo->bankHeight, bankHeightAlign); in ComputeSurfaceAlignmentsMacroTiled()
920 (tileSize * pipes * pTileInfo->bankWidth) in ComputeSurfaceAlignmentsMacroTiled()
922 … pTileInfo->macroAspectRatio = PowTwoAlign(pTileInfo->macroAspectRatio, macroAspectAlign); in ComputeSurfaceAlignmentsMacroTiled()
931 pTileInfo); in ComputeSurfaceAlignmentsMacroTiled()
936 macroTileWidth = MicroTileWidth * pTileInfo->bankWidth * pipes * in ComputeSurfaceAlignmentsMacroTiled()
937 pTileInfo->macroAspectRatio; in ComputeSurfaceAlignmentsMacroTiled()
947 macroTileHeight = MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks / in ComputeSurfaceAlignmentsMacroTiled()
948 pTileInfo->macroAspectRatio; in ComputeSurfaceAlignmentsMacroTiled()
957 pipes * pTileInfo->bankWidth * pTileInfo->banks * pTileInfo->bankHeight * tileSize; in ComputeSurfaceAlignmentsMacroTiled()
976 ADDR_TILEINFO* pTileInfo ///< [in] macro-tiled parameters in SanityCheckMacroTiled()
980 UINT_32 numPipes = HwlGetPipes(pTileInfo); in SanityCheckMacroTiled()
982 switch (pTileInfo->banks) in SanityCheckMacroTiled()
997 switch (pTileInfo->bankWidth) in SanityCheckMacroTiled()
1012 switch (pTileInfo->bankHeight) in SanityCheckMacroTiled()
1027 switch (pTileInfo->macroAspectRatio) in SanityCheckMacroTiled()
1042 if (pTileInfo->banks < pTileInfo->macroAspectRatio) in SanityCheckMacroTiled()
1051 if (pTileInfo->tileSplitBytes > m_rowSize) in SanityCheckMacroTiled()
1059 valid = HwlSanityCheckMacroTiled(pTileInfo); in SanityCheckMacroTiled()
1065 ADDR_ASSERT(numPipes * pTileInfo->banks >= 4); in SanityCheckMacroTiled()
1090 ADDR_TILEINFO* pTileInfo ///< [in] ptr to bank structure in ComputeSurfaceMipLevelTileMode()
1116 if (bytesPerTile > pTileInfo->tileSplitBytes) in ComputeSurfaceMipLevelTileMode()
1118 bytesPerTile = pTileInfo->tileSplitBytes; in ComputeSurfaceMipLevelTileMode()
1122 bytesPerTile * HwlGetPipes(pTileInfo) * pTileInfo->bankWidth * pTileInfo->macroAspectRatio; in ComputeSurfaceMipLevelTileMode()
1125 bytesPerTile * pTileInfo->bankWidth * pTileInfo->bankHeight; in ComputeSurfaceMipLevelTileMode()
1187 ADDR_ASSERT(pIn->pTileInfo); in HwlGetAlignmentInfoMacroTiled()
1188 ADDR_TILEINFO tileInfo = *pIn->pTileInfo; in HwlGetAlignmentInfoMacroTiled()
1190 out.pTileInfo = &tileInfo; in HwlGetAlignmentInfoMacroTiled()
1329 ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; in DispatchComputeSurfaceAddrFromCoord() local
1406 ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, in DispatchComputeSurfaceAddrFromCoord()
1429 pTileInfo, in DispatchComputeSurfaceAddrFromCoord()
1455 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure in ComputeMacroTileEquation() argument
1467 UINT_32 numPipes = HwlGetPipes(pTileInfo); in ComputeMacroTileEquation()
1470 for (UINT_32 i = 0; i < Log2(pTileInfo->bankWidth); i++) in ComputeMacroTileEquation()
1478 for (UINT_32 i = 0; i < Log2(pTileInfo->bankHeight); i++) in ComputeMacroTileEquation()
1495 (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; in ComputeMacroTileEquation()
1497 (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / in ComputeMacroTileEquation()
1498 pTileInfo->macroAspectRatio; in ComputeMacroTileEquation()
1504 retCode = ComputePipeEquation(log2BytesPP, thresholdX, thresholdY, pTileInfo, &equation); in ComputeMacroTileEquation()
1537 pTileInfo, &equation); in ComputeMacroTileEquation()
1598 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure in ComputeSurfaceAddrFromCoordMacroTiled() argument
1640 UINT_32 numPipes = HwlGetPipes(pTileInfo); in ComputeSurfaceAddrFromCoordMacroTiled()
1644 UINT_32 numBankBits = Log2(pTileInfo->banks); in ComputeSurfaceAddrFromCoordMacroTiled()
1702 if ((microTileBytes > pTileInfo->tileSplitBytes) && (microTileThickness == 1)) in ComputeSurfaceAddrFromCoordMacroTiled()
1708 slicesPerTile = microTileBytes / pTileInfo->tileSplitBytes; in ComputeSurfaceAddrFromCoordMacroTiled()
1713 tileSplitSlice = elementOffset / pTileInfo->tileSplitBytes; in ComputeSurfaceAddrFromCoordMacroTiled()
1719 elementOffset %= pTileInfo->tileSplitBytes; in ComputeSurfaceAddrFromCoordMacroTiled()
1725 microTileBytes = pTileInfo->tileSplitBytes; in ComputeSurfaceAddrFromCoordMacroTiled()
1736 (MicroTileWidth * pTileInfo->bankWidth * numPipes) * pTileInfo->macroAspectRatio; in ComputeSurfaceAddrFromCoordMacroTiled()
1738 (MicroTileHeight * pTileInfo->bankHeight * pTileInfo->banks) / pTileInfo->macroAspectRatio; in ComputeSurfaceAddrFromCoordMacroTiled()
1746 (numPipes * pTileInfo->banks); in ComputeSurfaceAddrFromCoordMacroTiled()
1778 tileRowIndex = (y / MicroTileHeight) % pTileInfo->bankHeight; in ComputeSurfaceAddrFromCoordMacroTiled()
1779 tileColumnIndex = ((x / MicroTileWidth) / numPipes) % pTileInfo->bankWidth; in ComputeSurfaceAddrFromCoordMacroTiled()
1780 tileIndex = (tileRowIndex * pTileInfo->bankWidth) + tileColumnIndex; in ComputeSurfaceAddrFromCoordMacroTiled()
1806 pTileInfo); in ComputeSurfaceAddrFromCoordMacroTiled()
1814 pTileInfo); in ComputeSurfaceAddrFromCoordMacroTiled()
2190 ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; in DispatchComputeSurfaceCoordFromAddr() local
2271 ExtractBankPipeSwizzle(pIn->tileSwizzle, pIn->pTileInfo, in DispatchComputeSurfaceCoordFromAddr()
2294 pTileInfo, in DispatchComputeSurfaceCoordFromAddr()
2331 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. in ComputeSurfaceCoordFromAddrMacroTiled() argument
2354 UINT_32 pipes = HwlGetPipes(pTileInfo); in ComputeSurfaceCoordFromAddrMacroTiled()
2355 UINT_32 banks = pTileInfo->banks; in ComputeSurfaceCoordFromAddrMacroTiled()
2381 if ((microTileBytes > pTileInfo->tileSplitBytes) && (microTileThickness == 1)) in ComputeSurfaceCoordFromAddrMacroTiled()
2387 slicesPerTile = microTileBytes / pTileInfo->tileSplitBytes; in ComputeSurfaceCoordFromAddrMacroTiled()
2393 UINT_32 macroWidth = pTileInfo->bankWidth * pipes * pTileInfo->macroAspectRatio; in ComputeSurfaceCoordFromAddrMacroTiled()
2395 UINT_32 macroHeight = pTileInfo->bankHeight * banks / pTileInfo->macroAspectRatio; in ComputeSurfaceCoordFromAddrMacroTiled()
2442 my = (tileIndex / pTileInfo->bankWidth) % pTileInfo->bankHeight * MicroTileHeight; in ComputeSurfaceCoordFromAddrMacroTiled()
2443 mx = (tileIndex % pTileInfo->bankWidth) * pipes * MicroTileWidth; in ComputeSurfaceCoordFromAddrMacroTiled()
2461 pTileInfo); in ComputeSurfaceCoordFromAddrMacroTiled()
2484 ADDR_TILEINFO* pTileInfo, ///< [in] bank structure. **All fields to be valid on entry** in ComputeSurfaceCoord2DFromBankPipe() argument
2499 UINT_32 numPipes = HwlGetPipes(pTileInfo); in ComputeSurfaceCoord2DFromBankPipe()
2502 pTileInfo->banks, numPipes); in ComputeSurfaceCoord2DFromBankPipe()
2506 UINT_32 xBit = x / (MicroTileWidth * pTileInfo->bankWidth * numPipes); in ComputeSurfaceCoord2DFromBankPipe()
2507 UINT_32 yBit = y / (MicroTileHeight * pTileInfo->bankHeight); in ComputeSurfaceCoord2DFromBankPipe()
2519 tileSplitRotation = ((pTileInfo->banks / 2) + 1); in ComputeSurfaceCoord2DFromBankPipe()
2532 bank %= pTileInfo->banks; in ComputeSurfaceCoord2DFromBankPipe()
2538 bank %= pTileInfo->banks; in ComputeSurfaceCoord2DFromBankPipe()
2542 if (pTileInfo->macroAspectRatio == 1) in ComputeSurfaceCoord2DFromBankPipe()
2544 switch (pTileInfo->banks) in ComputeSurfaceCoord2DFromBankPipe()
2569 else if (pTileInfo->macroAspectRatio == 2) in ComputeSurfaceCoord2DFromBankPipe()
2571 switch (pTileInfo->banks) in ComputeSurfaceCoord2DFromBankPipe()
2595 else if (pTileInfo->macroAspectRatio == 4) in ComputeSurfaceCoord2DFromBankPipe()
2597 switch (pTileInfo->banks) in ComputeSurfaceCoord2DFromBankPipe()
2618 else if (pTileInfo->macroAspectRatio == 8) in ComputeSurfaceCoord2DFromBankPipe()
2620 switch (pTileInfo->banks) in ComputeSurfaceCoord2DFromBankPipe()
2665 pIn->pTileInfo, in HwlExtractBankPipeSwizzle()
2685 ADDR_TILEINFO* pTileInfo, ///< [in] tile info in HwlCombineBankPipeSwizzle() argument
2694 *pTileSwizzle = GetBankPipeSwizzle(bankSwizzle, pipeSwizzle, baseAddr, pTileInfo); in HwlCombineBankPipeSwizzle()
2720 ADDR_TILEINFO* pTileInfo = pIn->pTileInfo; in HwlComputeBaseSwizzle() local
2723 ADDR_ASSERT(pIn->pTileInfo); in HwlComputeBaseSwizzle()
2733 UINT_32 pipes = HwlGetPipes(pTileInfo); in HwlComputeBaseSwizzle()
2735 UINT_32 banks = pTileInfo ? pTileInfo->banks : 2; in HwlComputeBaseSwizzle()
2775 pipeSwizzle = pIn->surfIndex & (HwlGetPipes(pTileInfo) - 1); in HwlComputeBaseSwizzle()
2778 return HwlCombineBankPipeSwizzle(bankSwizzle, pipeSwizzle, pTileInfo, 0, &pOut->tileSwizzle); in HwlComputeBaseSwizzle()
2792 ADDR_TILEINFO* pTileInfo, ///< [in] 2D tile parameters. Client must provide all data in ExtractBankPipeSwizzle() argument
2802 UINT_32 numPipes = HwlGetPipes(pTileInfo); in ExtractBankPipeSwizzle()
2803 UINT_32 bankBits = QLog2(pTileInfo->banks); in ExtractBankPipeSwizzle()
2832 ADDR_TILEINFO* pTileInfo ///< [in] tile info in GetBankPipeSwizzle()
2835 UINT_32 pipeBits = QLog2(HwlGetPipes(pTileInfo)); in GetBankPipeSwizzle()
2859 ADDR_TILEINFO* pTileInfo ///< [in] Bank structure in ComputeSliceTileSwizzle()
2868 UINT_32 numPipes = HwlGetPipes(pTileInfo); in ComputeSliceTileSwizzle()
2869 UINT_32 numBanks = pTileInfo->banks; in ComputeSliceTileSwizzle()
2883 pTileInfo, in ComputeSliceTileSwizzle()
2904 pTileInfo); in ComputeSliceTileSwizzle()
2928 if (IsMacroTiled(pInfo->tileMode) && pInfo->pStereoInfo && pInfo->pTileInfo) in HwlComputeQbStereoRightSwizzle()
2931 pInfo->tileMode, 0, 0, pInfo->pTileInfo); in HwlComputeQbStereoRightSwizzle()
2935 HwlCombineBankPipeSwizzle(bankBits, 0, pInfo->pTileInfo, 0, &swizzle); in HwlComputeQbStereoRightSwizzle()
2962 ADDR_TILEINFO* pTileInfo ///< [in] tile info in ComputeBankFromCoord()
2965 UINT_32 pipes = HwlGetPipes(pTileInfo); in ComputeBankFromCoord()
2973 UINT_32 numBanks = pTileInfo->banks; in ComputeBankFromCoord()
2974 UINT_32 bankWidth = pTileInfo->bankWidth; in ComputeBankFromCoord()
2975 UINT_32 bankHeight = pTileInfo->bankHeight; in ComputeBankFromCoord()
3018 bank = HwlPreAdjustBank((x / MicroTileWidth), bank, pTileInfo); in ComputeBankFromCoord()
3255 surfIn.pTileInfo = pIn->pTileInfo; in DispatchComputeFmaskInfo()
3260 surfOut.pTileInfo = pOut->pTileInfo; in DispatchComputeFmaskInfo()
3324 if (pOut->pTileInfo == NULL) in HwlComputeFmaskInfo()
3326 pOut->pTileInfo = &tileInfo; in HwlComputeFmaskInfo()
3334 HwlPostCheckTileIndex(pOut->pTileInfo, pIn->tileMode, ADDR_NON_DISPLAYABLE, in HwlComputeFmaskInfo()
3339 if (pOut->pTileInfo == &tileInfo) in HwlComputeFmaskInfo()
3341 pOut->pTileInfo = NULL; in HwlComputeFmaskInfo()
3486 const ADDR_TILEINFO* pTileInfo) in IsTileInfoAllZero() argument
3490 if (pTileInfo) in IsTileInfoAllZero()
3492 if ((pTileInfo->banks != 0) || in IsTileInfoAllZero()
3493 (pTileInfo->bankWidth != 0) || in IsTileInfoAllZero()
3494 (pTileInfo->bankHeight != 0) || in IsTileInfoAllZero()
3495 (pTileInfo->macroAspectRatio != 0) || in IsTileInfoAllZero()
3496 (pTileInfo->tileSplitBytes != 0) || in IsTileInfoAllZero()
3497 (pTileInfo->pipeConfig != 0) in IsTileInfoAllZero()
3552 ADDR_TILEINFO *pTileInfoIn = pIn->pTileInfo; in HwlConvertTileInfoToHW()
3553 ADDR_TILEINFO *pTileInfoOut = pOut->pTileInfo; in HwlConvertTileInfoToHW()
3830 if (pOut->pTileInfo == NULL) in HwlComputeSurfaceInfo()
3832 pOut->pTileInfo = &tileInfo; in HwlComputeSurfaceInfo()
3846 pOut->tileIndex = HwlPostCheckTileIndex(pOut->pTileInfo, in HwlComputeSurfaceInfo()
3857 pOut->pTileInfo); in HwlComputeSurfaceInfo()
3862 if (pOut->pTileInfo == &tileInfo) in HwlComputeSurfaceInfo()
3872 if (IsTileInfoAllZero(pIn->pTileInfo) == FALSE) in HwlComputeSurfaceInfo()
3876 ADDR_ASSERT(tileInfo.banks == pIn->pTileInfo->banks); in HwlComputeSurfaceInfo()
3877 ADDR_ASSERT(tileInfo.bankWidth == pIn->pTileInfo->bankWidth); in HwlComputeSurfaceInfo()
3878 ADDR_ASSERT(tileInfo.bankHeight == pIn->pTileInfo->bankHeight); in HwlComputeSurfaceInfo()
3879 ADDR_ASSERT(tileInfo.macroAspectRatio == pIn->pTileInfo->macroAspectRatio); in HwlComputeSurfaceInfo()
3880 ADDR_ASSERT(tileInfo.tileSplitBytes == pIn->pTileInfo->tileSplitBytes); in HwlComputeSurfaceInfo()
3884 pOut->pTileInfo = NULL; in HwlComputeSurfaceInfo()
3968 if (pIn->pTileInfo && (pIn->pTileInfo->banks > 0)) in HwlComputeSliceTileSwizzle()
3975 pIn->pTileInfo); in HwlComputeSliceTileSwizzle()
4020 ADDR_TILEINFO* pTileInfo ///< [in] Tile info in HwlComputeHtileBaseAlign()
4023 UINT_32 baseAlign = m_pipeInterleaveBytes * HwlGetPipes(pTileInfo); in HwlComputeHtileBaseAlign()
4027 ADDR_ASSERT(pTileInfo != NULL); in HwlComputeHtileBaseAlign()
4028 if (pTileInfo) in HwlComputeHtileBaseAlign()
4030 baseAlign *= pTileInfo->banks; in HwlComputeHtileBaseAlign()
4141 ADDR_TILEINFO* pTileInfo ///< Tiling info in HwlStereoCheckRightOffsetPadding()
4146 if (pTileInfo->macroAspectRatio > 2) in HwlStereoCheckRightOffsetPadding()
4154 stereoHeightAlign = pTileInfo->banks * in HwlStereoCheckRightOffsetPadding()
4155 pTileInfo->bankHeight * in HwlStereoCheckRightOffsetPadding()