Lines Matching refs:bankWidth

228     UINT_32 bankXStart = 3 + Log2(pipes) + Log2(pTileInfo->bankWidth);  in ComputeBankEquation()
425     if ((pTileInfo->bankWidth == 1) &&  in ComputeBankEquation()
2490         ADDR_ASSERT(pTileInfo->bankWidth == 1 && pTileInfo->macroAspectRatio > 1);  in HwlComputeSurfaceCoord2DFromBankPipe()
2504     *pX += xBit * numPipes * pTileInfo->bankWidth * MicroTileWidth;  in HwlComputeSurfaceCoord2DFromBankPipe()
2615         (pTileInfo->pipeConfig == ADDR_PIPECFG_P8_32x64_32x32)) && (pTileInfo->bankWidth == 1))  in HwlPreAdjustBank()
2988                 pInfo->bankWidth = 1;  in HwlSetupTileCfg()
3050     pCfg->info.bankWidth = 1 << gbTileMode.f.bank_width;  in ReadGbTileMode()
3498                                 m_tileTable[i].info.bankWidth * m_tileTable[i].info.bankHeight;  in HwlGetMaxAlignments()
3609                 key.fields.bankWidth        = tileConfig.info.bankWidth;  in InitEquationTable()
3671                                 HwlGetPipes(pTileInfo) * MicroTileWidth * pTileInfo->bankWidth *  in InitEquationTable()
3750                         HwlGetPipes(pTileInfo) * MicroTileWidth * pTileInfo->bankWidth *  in InitEquationTable()